threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
42 lines
1.7 KiB
C
42 lines
1.7 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __SOC_MEDIATEK_INFRACFG_H
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#define __SOC_MEDIATEK_INFRACFG_H
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#define MT8173_TOP_AXI_PROT_EN_MCI_M2 BIT(0)
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#define MT8173_TOP_AXI_PROT_EN_MM_M0 BIT(1)
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#define MT8173_TOP_AXI_PROT_EN_MM_M1 BIT(2)
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#define MT8173_TOP_AXI_PROT_EN_MMAPB_S BIT(6)
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#define MT8173_TOP_AXI_PROT_EN_L2C_M2 BIT(9)
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#define MT8173_TOP_AXI_PROT_EN_L2SS_SMI BIT(11)
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#define MT8173_TOP_AXI_PROT_EN_L2SS_ADD BIT(12)
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#define MT8173_TOP_AXI_PROT_EN_CCI_M2 BIT(13)
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#define MT8173_TOP_AXI_PROT_EN_MFG_S BIT(14)
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#define MT8173_TOP_AXI_PROT_EN_PERI_M0 BIT(15)
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#define MT8173_TOP_AXI_PROT_EN_PERI_M1 BIT(16)
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#define MT8173_TOP_AXI_PROT_EN_DEBUGSYS BIT(17)
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#define MT8173_TOP_AXI_PROT_EN_CQ_DMA BIT(18)
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#define MT8173_TOP_AXI_PROT_EN_GCPU BIT(19)
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#define MT8173_TOP_AXI_PROT_EN_IOMMU BIT(20)
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#define MT8173_TOP_AXI_PROT_EN_MFG_M0 BIT(21)
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#define MT8173_TOP_AXI_PROT_EN_MFG_M1 BIT(22)
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#define MT8173_TOP_AXI_PROT_EN_MFG_SNOOP_OUT BIT(23)
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#define MT2701_TOP_AXI_PROT_EN_MM_M0 BIT(1)
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#define MT2701_TOP_AXI_PROT_EN_CONN_M BIT(2)
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#define MT2701_TOP_AXI_PROT_EN_CONN_S BIT(8)
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#define MT7622_TOP_AXI_PROT_EN_ETHSYS (BIT(3) | BIT(17))
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#define MT7622_TOP_AXI_PROT_EN_HIF0 (BIT(24) | BIT(25))
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#define MT7622_TOP_AXI_PROT_EN_HIF1 (BIT(26) | BIT(27) | \
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BIT(28))
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#define MT7622_TOP_AXI_PROT_EN_WB (BIT(2) | BIT(6) | \
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BIT(7) | BIT(8))
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void mtk_infracfg_set_axi_si1_way_en(struct regmap *infracfg, u32 mask);
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void mtk_infracfg_clear_axi_si1_way_en(struct regmap *infracfg, u32 mask);
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int mtk_infracfg_set_bus_protection(struct regmap *infracfg, u32 mask,
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bool reg_update);
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int mtk_infracfg_clear_bus_protection(struct regmap *infracfg, u32 mask,
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bool reg_update);
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#endif /* __SOC_MEDIATEK_INFRACFG_H */
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