threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
56 lines
1.7 KiB
C
56 lines
1.7 KiB
C
/*
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* (C) Copyright 2009 Intel Corporation
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* Author: Jacob Pan (jacob.jun.pan@intel.com)
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*
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* Shared with ARM platforms, Jamie Iles, Picochip 2011
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Support for the Synopsys DesignWare APB Timers.
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*/
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#ifndef __DW_APB_TIMER_H__
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#define __DW_APB_TIMER_H__
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#include <linux/clockchips.h>
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#include <linux/clocksource.h>
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#include <linux/interrupt.h>
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#define APBTMRS_REG_SIZE 0x14
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struct dw_apb_timer {
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void __iomem *base;
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unsigned long freq;
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int irq;
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};
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struct dw_apb_clock_event_device {
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struct clock_event_device ced;
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struct dw_apb_timer timer;
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struct irqaction irqaction;
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void (*eoi)(struct dw_apb_timer *);
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};
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struct dw_apb_clocksource {
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struct dw_apb_timer timer;
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struct clocksource cs;
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};
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void dw_apb_clockevent_register(struct dw_apb_clock_event_device *dw_ced);
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void dw_apb_clockevent_pause(struct dw_apb_clock_event_device *dw_ced);
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void dw_apb_clockevent_resume(struct dw_apb_clock_event_device *dw_ced);
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void dw_apb_clockevent_stop(struct dw_apb_clock_event_device *dw_ced);
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struct dw_apb_clock_event_device *
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dw_apb_clockevent_init(int cpu, const char *name, unsigned rating,
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void __iomem *base, int irq, unsigned long freq);
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struct dw_apb_clocksource *
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dw_apb_clocksource_init(unsigned rating, const char *name, void __iomem *base,
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unsigned long freq);
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void dw_apb_clocksource_register(struct dw_apb_clocksource *dw_cs);
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void dw_apb_clocksource_start(struct dw_apb_clocksource *dw_cs);
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u64 dw_apb_clocksource_read(struct dw_apb_clocksource *dw_cs);
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#endif /* __DW_APB_TIMER_H__ */
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