threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
43 lines
1.1 KiB
C
43 lines
1.1 KiB
C
/*
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* Purna Chandra Mandal,<purna.mandal@microchip.com>
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* Copyright (C) 2015 Microchip Technology Inc. All rights reserved.
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*/
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#ifndef _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_
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#define _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_
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/* clock output indices */
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#define POSCCLK 0
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#define FRCCLK 1
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#define BFRCCLK 2
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#define LPRCCLK 3
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#define SOSCCLK 4
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#define FRCDIVCLK 5
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#define PLLCLK 6
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#define SCLK 7
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#define PB1CLK 8
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#define PB2CLK 9
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#define PB3CLK 10
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#define PB4CLK 11
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#define PB5CLK 12
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#define PB6CLK 13
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#define PB7CLK 14
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#define REF1CLK 15
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#define REF2CLK 16
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#define REF3CLK 17
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#define REF4CLK 18
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#define REF5CLK 19
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#define UPLLCLK 20
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#define MAXCLKS 21
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#endif /* _DT_BINDINGS_CLK_MICROCHIP_PIC32_H_ */
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