threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
70 lines
2.3 KiB
C
70 lines
2.3 KiB
C
/*
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* Copyright (C) 2013 STMicroelectronics (R&D) Limited
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* Author: Stephen Gallimore <stephen.gallimore@st.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#ifndef __STI_RESET_SYSCFG_H
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#define __STI_RESET_SYSCFG_H
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#include <linux/device.h>
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#include <linux/regmap.h>
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#include <linux/reset-controller.h>
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/**
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* Reset channel description for a system configuration register based
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* reset controller.
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*
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* @compatible: Compatible string of the syscon regmap containing this
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* channel's control and ack (status) bits.
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* @reset: Regmap field description of the channel's reset bit.
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* @ack: Regmap field description of the channel's acknowledge bit.
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*/
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struct syscfg_reset_channel_data {
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const char *compatible;
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struct reg_field reset;
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struct reg_field ack;
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};
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#define _SYSCFG_RST_CH(_c, _rr, _rb, _ar, _ab) \
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{ .compatible = _c, \
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.reset = REG_FIELD(_rr, _rb, _rb), \
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.ack = REG_FIELD(_ar, _ab, _ab), }
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#define _SYSCFG_RST_CH_NO_ACK(_c, _rr, _rb) \
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{ .compatible = _c, \
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.reset = REG_FIELD(_rr, _rb, _rb), }
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/**
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* Description of a system configuration register based reset controller.
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*
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* @wait_for_ack: The controller will wait for reset assert and de-assert to
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* be "ack'd" in a channel's ack field.
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* @active_low: Are the resets in this controller active low, i.e. clearing
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* the reset bit puts the hardware into reset.
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* @nr_channels: The number of reset channels in this controller.
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* @channels: An array of reset channel descriptions.
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*/
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struct syscfg_reset_controller_data {
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bool wait_for_ack;
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bool active_low;
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int nr_channels;
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const struct syscfg_reset_channel_data *channels;
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};
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/**
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* syscfg_reset_probe(): platform device probe function used by syscfg
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* reset controller drivers. This registers a reset
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* controller configured by the OF match data for
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* the compatible device which should be of type
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* "struct syscfg_reset_controller_data".
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*
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* @pdev: platform device
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*/
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int syscfg_reset_probe(struct platform_device *pdev);
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#endif /* __STI_RESET_SYSCFG_H */
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