Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
367 lines
14 KiB
C
367 lines
14 KiB
C
/*
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* ln8000-charger.h - Charger driver for LIONSEMI LN8000
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*
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* Copyright (C) 2021 Lion Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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*/
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#ifndef __LN8000_CHARGER_H__
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#define __LN8000_CHARGER_H__
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/* For support TI extend propertis */
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#define BAT_OVP_FAULT_SHIFT 0
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#define BAT_OCP_FAULT_SHIFT 1
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#define BUS_OVP_FAULT_SHIFT 2
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#define BUS_OCP_FAULT_SHIFT 3
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#define BAT_THERM_FAULT_SHIFT 4
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#define BUS_THERM_FAULT_SHIFT 5
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#define DIE_THERM_FAULT_SHIFT 6
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#define BAT_OVP_ALARM_SHIFT 0
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#define BAT_OCP_ALARM_SHIFT 1
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#define BUS_OVP_ALARM_SHIFT 2
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#define BUS_OCP_ALARM_SHIFT 3
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#define BAT_THERM_ALARM_SHIFT 4
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#define BUS_THERM_ALARM_SHIFT 5
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#define DIE_THERM_ALARM_SHIFT 6
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#define BAT_UCP_ALARM_SHIFT 7
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#define VBAT_REG_STATUS_SHIFT 0
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#define IBAT_REG_STATUS_SHIFT 1
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#if 0
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enum hvdcp3_type {
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HVDCP3_NONE = 0,
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HVDCP3_CLASSA_18W,
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HVDCP3_CLASSB_27W,
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HVDCP3P5_CLASSA_18W,
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HVDCP3P5_CLASSB_27W,
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};
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#else
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enum hvdcp3_type {
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HVDCP3_NONE = 0,
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HVDCP3_CLASSA_18W,
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HVDCP3_CLASSB_27W,
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HVDCP3_P_CLASSA_18W,
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HVDCP3_P_CLASSB_27W,
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};
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#endif
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/* bus protection values for QC */
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#define BUS_OVP_FOR_QC 13000000 /* ln8000 didn't used 10V, (support tot 6.5V, 11V, 12V, 13V) */
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#define BUS_OVP_ALARM_FOR_QC 9500000
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#define BUS_OCP_FOR_QC_CLASS_A 3250000
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#define BUS_OCP_ALARM_FOR_QC_CLASS_A 2000000
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#define BUS_OCP_FOR_QC_CLASS_B 4000000
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#define BUS_OCP_ALARM_FOR_QC_CLASS_B 3000000
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#define BUS_OVP_FOR_QC35 13000000
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#define BUS_OVP_ALARM_FOR_QC35 9500000
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#define BUS_OCP_FOR_QC35_CLASS_A_P 3000000
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#define BUS_OCP_ALARM_FOR_QC35_CLASS_A_P 2550000
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/**
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* ln8000 device descripion definition
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*/
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#define ASSIGNED_BITS(_end, _start) ((BIT(_end) - BIT(_start)) + BIT(_end))
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/* register map description */
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enum ln8000_int1_desc {
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LN8000_MASK_FAULT_INT = BIT(7),
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LN8000_MASK_NTC_PROT_INT = BIT(6),
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LN8000_MASK_CHARGE_PHASE_INT = BIT(5),
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LN8000_MASK_MODE_INT = BIT(4),
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LN8000_MASK_REV_CURR_INT = BIT(3),
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LN8000_MASK_TEMP_INT = BIT(2),
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LN8000_MASK_ADC_DONE_INT = BIT(1),
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LN8000_MASK_TIMER_INT = BIT(0),
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};
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enum ln8000_sys_sts_desc {
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LN8000_MASK_IIN_LOOP_STS = BIT(7),
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LN8000_MASK_VFLOAT_LOOP_STS = BIT(6),
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LN8000_MASK_BYPASS_ENABLED = BIT(3),
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LN8000_MASK_SWITCHING_ENABLED = BIT(2),
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LN8000_MASK_STANDBY_STS = BIT(1),
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LN8000_MASK_SHUTDOWN_STS = BIT(0),
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};
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enum ln8000_safety_sts_desc {
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LN8000_MASK_TEMP_MAX_STS = BIT(6),
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LN8000_MASK_TEMP_REGULATION_STS = BIT(5),
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LN8000_MASK_NTC_ALARM_STS = BIT(4),
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LN8000_MASK_NTC_SHUTDOWN_STS = BIT(3),
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LN8000_MASK_REV_IIN_STS = BIT(2),
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};
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enum ln8000_fault1_sts_desc {
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LN8000_MASK_WATCHDOG_TIMER_STS = BIT(7),
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LN8000_MASK_VBAT_OV_STS = BIT(6),
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LN8000_MASK_VAC_UNPLUG_STS = BIT(4),
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LN8000_MASK_VAC_OV_STS = BIT(3),
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LN8000_MASK_VIN_OV_STS = BIT(1),
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LN8000_MASK_VFAULTS = ASSIGNED_BITS(6,0),
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};
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enum ln8000_fault2_sts_desc {
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LN8000_MASK_IIN_OC_DETECTED = BIT(7),
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};
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enum ln8000_ldo_sts_desc {
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LN8000_MASK_VBAT_MIN_OK_STS = BIT(7),
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LN8000_MASK_CHARGE_TERM_STS = BIT(5),
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LN8000_MASK_RECHARGE_STS = BIT(4),
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};
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enum ln8000_regulation_ctrl_desc {
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LN8000_BIT_ENABLE_VFLOAT_LOOP_INT = 7,
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LN8000_BIT_ENABLE_IIN_LOOP_INT = 6,
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LN8000_BIT_DISABLE_VFLOAT_LOOP = 5,
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LN8000_BIT_DISABLE_IIN_LOOP = 4,
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LN8000_BIT_TEMP_MAX_EN = 2,
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LN8000_BIT_TEMP_REG_EN = 1,
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};
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enum ln8000_sys_ctrl_desc {
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LN8000_BIT_STANDBY_EN = 3,
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LN8000_BIT_REV_IIN_DET = 2,
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LN8000_BIT_EN_1TO1 = 0,
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};
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enum ln8000_fault_ctrl_desc {
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LN8000_BIT_DISABLE_IIN_OCP = 6,
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LN8000_BIT_DISABLE_VBAT_OV = 5,
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LN8000_BIT_DISABLE_VAC_OV = 4,
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LN8000_BIT_DISABLE_VAC_UV = 3,
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LN8000_BIT_DISABLE_VIN_OV = 2,
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};
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enum ln8000_bc_op1_desc {
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LN8000_BIT_DUAL_FUNCTION_EN = 2,
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LN8000_BIT_DUAL_CFG = 1,
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LN8000_BIT_DUAL_LOCKOUT_EN = 0,
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};
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enum ln8000_reg_addr {
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LN8000_REG_DEVICE_ID = 0x00,
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LN8000_REG_INT1 = 0x01,
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LN8000_REG_INT1_MSK = 0x02,
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LN8000_REG_SYS_STS = 0x03,
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LN8000_REG_SAFETY_STS = 0x04,
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LN8000_REG_FAULT1_STS = 0x05,
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LN8000_REG_FAULT2_STS = 0x06,
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LN8000_REG_CURR1_STS = 0x07,
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LN8000_REG_LDO_STS = 0x08,
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LN8000_REG_ADC01_STS = 0x09,
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LN8000_REG_ADC02_STS = 0x0A,
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LN8000_REG_ADC03_STS = 0x0B,
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LN8000_REG_ADC04_STS = 0x0C,
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LN8000_REG_ADC05_STS = 0x0D,
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LN8000_REG_ADC06_STS = 0x0E,
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LN8000_REG_ADC07_STS = 0x0F,
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LN8000_REG_ADC08_STS = 0x10,
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LN8000_REG_ADC09_STS = 0x11,
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LN8000_REG_ADC10_STS = 0x12,
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LN8000_REG_IIN_CTRL = 0x1B,
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LN8000_REG_REGULATION_CTRL = 0x1C,
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LN8000_REG_PWR_CTRL = 0x1D,
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LN8000_REG_SYS_CTRL = 0x1E,
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LN8000_REG_LDO_CTRL = 0x1F,
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LN8000_REG_GLITCH_CTRL = 0x20,
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LN8000_REG_FAULT_CTRL = 0x21,
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LN8000_REG_NTC_CTRL = 0x22,
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LN8000_REG_ADC_CTRL = 0x23,
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LN8000_REG_ADC_CFG = 0x24,
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LN8000_REG_RECOVERY_CTRL = 0x25,
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LN8000_REG_TIMER_CTRL = 0x26,
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LN8000_REG_THRESHOLD_CTRL = 0x27,
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LN8000_REG_V_FLOAT_CTRL = 0x28,
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LN8000_REG_CHARGE_CTRL = 0x29,
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LN8000_REG_LION_CTRL = 0x30,
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LN8000_REG_BC_OP_1 = 0x41,
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LN8000_REG_BC_OP_2 = 0x42,
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LN8000_REG_BC_STS_A = 0x49,
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LN8000_REG_BC_STS_B = 0x4A,
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LN8000_REG_BC_STS_C = 0x4B,
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LN8000_REG_BC_STS_D = 0x4C,
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LN8000_REG_BC_STS_E = 0x4D,
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LN8000_REG_MAX,
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};
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/* device feature configuration desc */
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#define LN8000_DEVICE_ID 0x42
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enum ln8000_role {
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LN_ROLE_STANDALONE = 0x0,
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LN_ROLE_MASTER = 0x1,
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LN_ROLE_SLAVE = 0x2,
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};
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enum ln8000_opmode_{
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LN8000_OPMODE_UNKNOWN = 0x0,
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LN8000_OPMODE_STANDBY = 0x1,
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LN8000_OPMODE_BYPASS = 0x2,
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LN8000_OPMODE_SWITCHING = 0x3,
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};
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enum ln8000_vac_ov_cfg_desc {
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LN8000_VAC_OVP_6P5V = 0x0,
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LN8000_VAC_OVP_11V = 0x1,
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LN8000_VAC_OVP_12V = 0x2,
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LN8000_VAC_OVP_13V = 0x3,
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};
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enum ln8000_watchdpg_cfg_desc {
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LN8000_WATCHDOG_5SEC = 0x0,
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LN8000_WATCHDOG_10SEC = 0x1,
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LN8000_WATCHDOG_20SEC = 0x2,
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LN8000_WATCHDOG_40SEC = 0x3,
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LN8000_WATCHDOG_MAX
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};
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enum ln8000_adc_channel_index {
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LN8000_ADC_CH_VOUT = 1,
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LN8000_ADC_CH_VIN,
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LN8000_ADC_CH_VBAT,
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LN8000_ADC_CH_VAC,
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LN8000_ADC_CH_IIN,
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LN8000_ADC_CH_DIETEMP,
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LN8000_ADC_CH_TSBAT,
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LN8000_ADC_CH_TSBUS,
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LN8000_ADC_CH_ALL
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};
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enum ln8000_adc_mode_desc { /* used FORCE_ADC_MODE + ADC_SHUTDOWN_CFG */
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ADC_AUTO_HIB_MODE = 0x0,
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ADC_AUTO_SHD_MODE = 0x1,
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ADC_SHUTDOWN_MODE = 0x2,
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ADC_HIBERNATE_MODE = 0x4,
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ADC_NORMAL_MODE = 0x6,
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};
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enum ln8000_adc_hibernate_delay_desc {
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ADC_HIBERNATE_500MS = 0x0,
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ADC_HIBERNATE_1S = 0x1,
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ADC_HIBERNATE_2S = 0x2,
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ADC_HIBERNATE_4S = 0x3,
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};
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/* electrical numeric calculation unit description */
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#define LN8000_VBAT_FLOAT_MIN 3725000 /* unit = uV */
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#define LN8000_VBAT_FLOAT_MAX 5000000
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#define LN8000_VBAT_FLOAT_LSB 5000
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#define LN8000_ADC_VOUT_STEP 5000 /* 5mV= 5000uV LSB (0V ~ 5.115V) */
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#define LN8000_ADC_VIN_STEP 16000 /* 16mV=16000uV LSB (0V ~ 16.386V) */
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#define LN8000_ADC_VBAT_STEP 5000 /* 5mV= 5000uV LSB (0V ~ 5.115V) */
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#define LN8000_ADC_VBAT_MIN 1000000 /* 1V */
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#define LN8000_ADC_VAC_STEP 16000 /* 16mV=16000uV LSB (0V ~ 16.386V) */
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#define LN8000_ADC_VAC_OS 5
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#define LN8000_ADC_IIN_STEP 4890 /* 4.89mA=4890uA LSB (0A ~ 5A) */
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#define LN8000_ADC_DIETEMP_STEP 4350 /* 0.435C LSB = 4350dC/1000 (-25C ~ 160C) */
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#define LN8000_ADC_DIETEMP_DENOM 1000 /* 1000 */
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#define LN8000_ADC_DIETEMP_MIN (-250) /* -25C = -250dC */
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#define LN8000_ADC_DIETEMP_MAX 1600 /* 160C = 1600dC */
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#define LN8000_ADC_NTCV_STEP 2933 /* 2.933mV=2933uV LSB (0V ~ 3V) */
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#define LN8000_IIN_CFG_MIN 500000 /* 500mA=500,000uA */
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#define LN8000_IIN_CFG_LSB 50000 /* 50mA=50,000uA */
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/* device default values */
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#define LN8000_BAT_OVP_DEFAULT 4440000
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#define LN8000_BUS_OVP_DEFAULT 9500000
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#define LN8000_BUS_OCP_DEFAULT 2000000
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#define LN8000_NTC_ALARM_CFG_DEFAULT 226 /* NTC alarm threshold (~40C) */
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#define LN8000_NTC_SHUTDOWN_CFG 2 /* NTC shutdown config (-16LSB ~ 4.3C) */
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#define LN8000_DEFAULT_FSW_CFG 8 /* 8=440kHz, switching freq */
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#define LN8000_IIN_CFG_DEFAULT 2000000 /* 2A=2,000,000uA, input current limit */
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/**
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* driver instance structure definition
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*/
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struct ln8000_platform_data {
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struct gpio_desc *irq_gpio; /* GPIO pin for (generic/power-on) interrupt */
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/* feature configuration */
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unsigned int bat_ovp_th; /* battery ovp threshold (mV) */
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unsigned int bat_ovp_alarm_th; /* battery ovp alarm threshold (mV) */
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unsigned int bus_ovp_th; /* IIN ovp threshold (mV) */
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unsigned int bus_ovp_alarm_th; /* IIN ovp alarm threshold (mV) */
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unsigned int bus_ocp_th; /* IIN ocp threshold (mA) */
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unsigned int bus_ocp_alarm_th; /* IIN ocp alarm threshold */
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unsigned int ntc_alarm_cfg; /* input/battery NTC voltage threshold code: 0~1023 */
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/* protection enable/disable */
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bool vbat_ovp_disable; /* disable battery voltage OVP */
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bool vbat_reg_disable; /* disable battery voltage (float) regulation */
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bool iin_ocp_disable; /* disable input current OCP */
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bool iin_reg_disable; /* disable input current regulation */
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bool tbus_mon_disable; /* disable BUS temperature monitor (prot/alarm) */
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bool tbat_mon_disable; /* disable BAT temperature monitor (prot/alarm) */
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bool tdie_prot_disable; /* disable die temperature protection */
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bool tdie_reg_disable; /* disable die temperature regulation */
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bool revcurr_prot_disable; /* disable reverse current protection */
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};
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struct ln8000_info {
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struct device *dev;
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struct i2c_client *client;
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struct ln8000_platform_data *pdata;
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struct power_supply *psy_chg;
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struct mutex data_lock;
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struct mutex i2c_lock;
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struct mutex irq_lock;
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struct power_supply_config psy_cfg;
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struct power_supply_desc psy_desc;
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unsigned int op_mode; /* target operation mode */
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unsigned int pwr_status; /* current device status */
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unsigned int dev_role; /* device role */
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/* system/device status */
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bool vbat_regulated; /* vbat loop is active (+ OV alarm) */
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bool iin_regulated; /* iin loop is active (+ OC alarm) */
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bool tdie_fault; /* die temperature fault */
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bool tbus_tbat_fault; /* BUS/BAT temperature fault */
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bool tdie_alarm; /* die temperature alarm (regulated) */
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bool tbus_tbat_alarm; /* BUS/BAT temperature alarm */
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bool wdt_fault; /* watchdog timer expiration */
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bool vbat_ov; /* vbat OV fault */
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bool vac_ov; /* vac OV fault */
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bool vbus_ov; /* vbus OV fault */
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bool iin_oc; /* iin OC fault */
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bool vac_unplug; /* vac unplugged */
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bool iin_rc; /* iin reverse current detected */
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bool volt_qual; /* all voltages are qualified */
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bool usb_present; /* usb plugged (present) */
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bool chg_en; /* charging enavbled */
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bool rcp_en; /* reverse current protection enabled */
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int vbat_ovp_alarm_th; /* vbat ovp alarm threshold */
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int vin_ovp_alarm_th; /* vin ovp alarm threshold */
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int iin_ocp_alarm_th; /* iin ocp alarm threshold */
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/* ADC readings */
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int tbat_uV; /* BAT temperature (NTC, uV) */
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int tbus_uV; /* BUS temperature (NTC, uV) */
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int tdie_dC; /* die temperature (deci-Celsius) */
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int vbat_uV; /* battery voltage (uV) */
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int vbus_uV; /* input voltage (uV) */
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int iin_uA; /* input current (uV) */
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/* debugfs */
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struct dentry *debug_root;
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u32 debug_address;
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};
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#endif /* __LN8000_CHARGER_H__ */
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