Files
android/drivers/misc/mediatek/include/mt-plat/mtk_lpae.h
T
threeeye bc1d038eac REVVL 6 Pro kernel bring-up: full working tree snapshot (2026-09-12)
Squashed backup commit (no shallow-clone history issues) of
xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream
commit 9eece662e) plus all fixes applied to get everpal_defconfig building
clean against a modern (GCC 15.2.0) toolchain -- see the previous commit
message on the lineage-23.2 branch (also in this repo history is not
available here since this is a squashed snapshot; full incremental history
lives in the local DL380 checkout and the upstream GitHub remote).

Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
2026-09-12 13:36:46 +00:00

65 lines
1.7 KiB
C

/*
* Copyright (C) 2016 MediaTek Inc.
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#ifndef __MTK_LPAE_H__
#define __MTK_LPAE_H__
#ifdef CONFIG_MTK_LM_MODE
#include <mt-plat/mtk_io.h>
#define INTERAL_MAPPING_OFFSET (0x40000000)
#define INTERAL_MAPPING_LIMIT (INTERAL_MAPPING_OFFSET + 0x80000000)
#define MT_OVERFLOW_ADDR_START 0x100000000ULL
unsigned int __attribute__((weak)) enable_4G(void)
{
return 0;
}
/* For HW modules which support 33-bit address setting */
#define CROSS_OVERFLOW_ADDR_TRANSFER(phy_addr, size, ret) \
do { \
ret = 0; \
if (enable_4G()) {\
if (((phys_addr_t)phy_addr < MT_OVERFLOW_ADDR_START)\
&& (((phys_addr_t)phy_addr + size) >= \
MT_OVERFLOW_ADDR_START)) \
ret = MT_OVERFLOW_ADDR_START - phy_addr; \
} \
} while (0) \
/* For SPM and MD32 only in ROME */
#define MAPPING_DRAM_ACCESS_ADDR(phy_addr) \
do { \
if (enable_4G()) {\
if (phy_addr >= INTERAL_MAPPING_OFFSET \
&& phy_addr < INTERAL_MAPPING_LIMIT) \
phy_addr += INTERAL_MAPPING_OFFSET; \
} \
} while (0)\
#else /* !CONFIG_ARM_LPAE */
#define CROSS_OVERFLOW_ADDR_TRANSFER(phy_addr, size, ret)
#define MAPPING_DRAM_ACCESS_ADDR(phy_addr)
#define MT_OVERFLOW_ADDR_START 0
static inline unsigned int enable_4G(void)
{
return 0;
}
#endif
#endif /*!__MTK_LPAE_H__ */