threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
60 lines
1.7 KiB
C
60 lines
1.7 KiB
C
/*
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* Copyright (C) 2017 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <mt-plat/mtk_secure_api.h>
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#ifndef CONFIG_ARM64
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#include <asm/opcodes-sec.h>
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#include <asm/opcodes-virt.h>
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#endif
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#if defined(CONFIG_ARM64)
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#define LOCAL_REG_SET_DECLARE \
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register size_t reg0 __asm__("x0") = function_id; \
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register size_t reg1 __asm__("x1") = arg0; \
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register size_t reg2 __asm__("x2") = arg1; \
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register size_t reg3 __asm__("x3") = arg2; \
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register size_t reg4 __asm__("x4") = arg3; \
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size_t ret
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#else
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#define LOCAL_REG_SET_DECLARE \
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register size_t reg0 __asm__("r0") = function_id; \
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register size_t reg1 __asm__("r1") = arg0; \
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register size_t reg2 __asm__("r2") = arg1; \
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register size_t reg3 __asm__("r3") = arg2; \
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register size_t reg4 __asm__("r4") = arg3; \
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size_t ret
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#endif
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size_t mt_secure_call_all(size_t function_id,
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size_t arg0, size_t arg1, size_t arg2,
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size_t arg3, size_t *r1, size_t *r2, size_t *r3)
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{
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LOCAL_REG_SET_DECLARE;
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#ifdef CONFIG_ARM64
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__asm__ volatile ("smc #0x0\n" : "+r"(reg0),
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"+r"(reg1), "+r"(reg2), "+r"(reg3), "+r"(reg4));
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#else
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__asm__ volatile (__SMC(0) : "+r"(reg0),
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"+r"(reg1), "+r"(reg2), "+r"(reg3), "+r"(reg4));
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#endif
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ret = reg0;
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if (r1 != NULL)
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*r1 = reg1;
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if (r2 != NULL)
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*r2 = reg2;
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if (r3 != NULL)
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*r3 = reg3;
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return ret;
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}
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