threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
152 lines
4.4 KiB
C
152 lines
4.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0
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*
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* Copyright (c) 2019 MediaTek Inc.
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*/
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#ifndef __HELIO_DVFSRC_H
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#define __HELIO_DVFSRC_H
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#include <linux/delay.h>
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#include <linux/devfreq.h>
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#include <linux/io.h>
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#if defined(CONFIG_MACH_MT6765)
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#include <helio-dvfsrc-mt6765.h>
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#elif defined(CONFIG_MACH_MT8168)
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#include <helio-dvfsrc-mt8168.h>
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#elif defined(CONFIG_MACH_MT3967)
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#include <helio-dvfsrc-mt3967.h>
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#elif defined(CONFIG_MACH_MT6779)
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#include <helio-dvfsrc-mt6779.h>
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#else
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#include <helio-dvfsrc-mt67xx.h>
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#endif
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#include "helio-dvfsrc-opp.h"
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struct reg_config {
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u32 offset;
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u32 val;
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};
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struct helio_dvfsrc {
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struct devfreq *devfreq;
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int irq;
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struct device *dev;
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bool qos_enabled;
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bool dvfsrc_enabled;
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int dvfsrc_flag;
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void __iomem *regs;
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void __iomem *sram_regs;
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struct regmap *spm_map;
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struct clk *clk_dvfsrc;
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struct notifier_block pm_qos_memory_bw_nb;
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struct notifier_block pm_qos_cpu_memory_bw_nb;
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struct notifier_block pm_qos_gpu_memory_bw_nb;
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struct notifier_block pm_qos_mm_memory_bw_nb;
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struct notifier_block pm_qos_other_memory_bw_nb;
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struct notifier_block pm_qos_ddr_opp_nb;
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struct notifier_block pm_qos_vcore_opp_nb;
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struct notifier_block pm_qos_scp_vcore_request_nb;
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struct notifier_block pm_qos_power_model_ddr_request_nb;
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struct notifier_block pm_qos_power_model_vcore_request_nb;
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struct notifier_block pm_qos_vcore_dvfs_force_opp_nb;
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struct notifier_block pm_qos_isp_hrt_bw_nb;
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struct notifier_block pm_qos_apu_memory_bw_nb;
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struct reg_config *init_config;
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bool opp_forced;
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int (*suspend)(struct helio_dvfsrc *dvfsrc_dev);
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int (*resume)(struct helio_dvfsrc *dvfsrc_dev);
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};
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#define DVFSRC_TIMEOUT 1000
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#define SPM_FLAG_DIS_VCORE_DVS (1U << 3)
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#define SPM_FLAG_DIS_VCORE_DFS (1U << 4)
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#define SPM_FLAG_RUN_COMMON_SCENARIO (1U << 10)
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#define SPM_FLAG_DRAM_LPDDR_TYPE (1U << 17)
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#define PCM_REG15_DATA 0x13C
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#define SPM_SW_RSV_9 0x658
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#define SPM_DVFS_EVENT_STA 0x69C
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/* PMIC */
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#define vcore_pmic_to_uv(pmic) \
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(((pmic) * VCORE_STEP_UV) + VCORE_BASE_UV)
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#define vcore_uv_to_pmic(uv) /* pmic >= uv */ \
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((((uv) - VCORE_BASE_UV) + (VCORE_STEP_UV - 1)) / VCORE_STEP_UV)
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#define dvfsrc_wait_for_completion(condition, timeout) \
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({ \
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int ret = 0; \
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if (is_dvfsrc_enabled()) \
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ret = 1; \
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while (!(condition) && ret > 0) { \
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if (ret++ >= timeout) { \
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pr_err("timeout %x\n", get_cur_vcore_dvfs_opp());\
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ret = -EBUSY; \
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} \
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udelay(1); \
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} \
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ret; \
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})
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enum {
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QOS_EMI_BW_TOTAL = 0,
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QOS_EMI_BW_TOTAL_W,
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QOS_EMI_BW_CPU,
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QOS_EMI_BW_GPU,
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QOS_EMI_BW_MM,
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QOS_EMI_BW_OTHER,
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QOS_EMI_BW_TOTAL_AVE,
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QOS_EMI_BW_NUM
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};
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extern int is_qos_enabled(void);
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extern int is_dvfsrc_enabled(void);
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extern int is_opp_forced(void);
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extern int get_vcore_dvfs_level(void);
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extern void mtk_spmfw_init(int dvfsrc_en, int skip_check);
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extern struct reg_config *dvfsrc_get_init_conf(void);
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extern void helio_dvfsrc_enable(int dvfsrc_en);
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extern void helio_dvfsrc_flag_set(int flag);
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extern int helio_dvfsrc_flag_get(void);
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extern char *dvfsrc_dump_reg(char *ptr);
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extern u32 dvfsrc_read(u32 offset);
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extern void dvfsrc_write(u32 offset, u32 val);
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extern u32 dvfsrc_sram_read(u32 offset);
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extern void dvfsrc_sram_write(u32 offset, u32 val);
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extern void dvfsrc_opp_table_init(void);
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extern void helio_dvfsrc_reg_config(struct reg_config *config);
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extern void helio_dvfsrc_sram_reg_init(void);
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extern int spm_get_spmfw_idx(void);
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extern int helio_dvfsrc_add_interface(struct device *dev);
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extern void helio_dvfsrc_remove_interface(struct device *dev);
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extern void dvfsrc_opp_level_mapping(void);
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extern void helio_dvfsrc_sspm_ipi_init(int dvfsrc_en);
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extern void get_opp_info(char *p);
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extern void get_dvfsrc_reg(char *p);
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extern void get_dvfsrc_record(char *p);
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extern void get_dvfsrc_record_latch(char *p);
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extern void get_spm_reg(char *p);
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extern void spm_dvfs_pwrap_cmd(int pwrap_cmd, int pwrap_vcore);
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extern int helio_dvfsrc_platform_init(struct helio_dvfsrc *dvfsrc);
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extern u32 spm_get_dvfs_level(void);
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extern u32 spm_get_dvfs_final_level(void);
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extern u32 spm_get_pcm_reg9_data(void);
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extern void dvfsrc_set_power_model_ddr_request(unsigned int level);
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/* met profile function */
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extern int vcorefs_get_opp_info_num(void);
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extern char **vcorefs_get_opp_info_name(void);
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extern unsigned int *vcorefs_get_opp_info(void);
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extern int vcorefs_get_src_req_num(void);
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extern char **vcorefs_get_src_req_name(void);
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extern unsigned int *vcorefs_get_src_req(void);
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extern u32 vcorefs_get_md_scenario(void);
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#endif /* __HELIO_DVFSRC_H */
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