threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
79 lines
2.1 KiB
C
79 lines
2.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef ARCH_X86_CPU_H
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#define ARCH_X86_CPU_H
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/* attempt to consolidate cpu attributes */
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struct cpu_dev {
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const char *c_vendor;
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/* some have two possibilities for cpuid string */
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const char *c_ident[2];
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void (*c_early_init)(struct cpuinfo_x86 *);
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void (*c_bsp_init)(struct cpuinfo_x86 *);
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void (*c_init)(struct cpuinfo_x86 *);
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void (*c_identify)(struct cpuinfo_x86 *);
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void (*c_detect_tlb)(struct cpuinfo_x86 *);
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void (*c_bsp_resume)(struct cpuinfo_x86 *);
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int c_x86_vendor;
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#ifdef CONFIG_X86_32
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/* Optional vendor specific routine to obtain the cache size. */
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unsigned int (*legacy_cache_size)(struct cpuinfo_x86 *,
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unsigned int);
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/* Family/stepping-based lookup table for model names. */
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struct legacy_cpu_model_info {
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int family;
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const char *model_names[16];
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} legacy_models[5];
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#endif
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};
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struct _tlb_table {
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unsigned char descriptor;
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char tlb_type;
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unsigned int entries;
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/* unsigned int ways; */
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char info[128];
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};
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#define cpu_dev_register(cpu_devX) \
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static const struct cpu_dev *const __cpu_dev_##cpu_devX __used \
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__attribute__((__section__(".x86_cpu_dev.init"))) = \
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&cpu_devX;
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extern const struct cpu_dev *const __x86_cpu_dev_start[],
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*const __x86_cpu_dev_end[];
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#ifdef CONFIG_CPU_SUP_INTEL
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enum tsx_ctrl_states {
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TSX_CTRL_ENABLE,
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TSX_CTRL_DISABLE,
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TSX_CTRL_NOT_SUPPORTED,
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};
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extern __ro_after_init enum tsx_ctrl_states tsx_ctrl_state;
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extern void __init tsx_init(void);
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extern void tsx_enable(void);
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extern void tsx_disable(void);
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#else
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static inline void tsx_init(void) { }
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#endif /* CONFIG_CPU_SUP_INTEL */
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extern void get_cpu_cap(struct cpuinfo_x86 *c);
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extern void cpu_detect_cache_sizes(struct cpuinfo_x86 *c);
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extern int detect_extended_topology_early(struct cpuinfo_x86 *c);
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extern int detect_ht_early(struct cpuinfo_x86 *c);
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unsigned int aperfmperf_get_khz(int cpu);
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void cpu_select_mitigations(void);
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extern void x86_spec_ctrl_setup_ap(void);
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extern void update_srbds_msr(void);
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extern void update_gds_msr(void);
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extern u64 x86_read_arch_cap_msr(void);
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#endif /* ARCH_X86_CPU_H */
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