Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
29 lines
1.5 KiB
C
29 lines
1.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _SPARC64_DCU_H
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#define _SPARC64_DCU_H
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#include <linux/const.h>
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/* UltraSparc-III Data Cache Unit Control Register */
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#define DCU_CP _AC(0x0002000000000000,UL) /* Phys Cache Enable w/o mmu */
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#define DCU_CV _AC(0x0001000000000000,UL) /* Virt Cache Enable w/o mmu */
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#define DCU_ME _AC(0x0000800000000000,UL) /* NC-store Merging Enable */
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#define DCU_RE _AC(0x0000400000000000,UL) /* RAW bypass Enable */
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#define DCU_PE _AC(0x0000200000000000,UL) /* PCache Enable */
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#define DCU_HPE _AC(0x0000100000000000,UL) /* HW prefetch Enable */
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#define DCU_SPE _AC(0x0000080000000000,UL) /* SW prefetch Enable */
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#define DCU_SL _AC(0x0000040000000000,UL) /* Secondary ld-steering Enab*/
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#define DCU_WE _AC(0x0000020000000000,UL) /* WCache enable */
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#define DCU_PM _AC(0x000001fe00000000,UL) /* PA Watchpoint Byte Mask */
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#define DCU_VM _AC(0x00000001fe000000,UL) /* VA Watchpoint Byte Mask */
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#define DCU_PR _AC(0x0000000001000000,UL) /* PA Watchpoint Read Enable */
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#define DCU_PW _AC(0x0000000000800000,UL) /* PA Watchpoint Write Enable*/
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#define DCU_VR _AC(0x0000000000400000,UL) /* VA Watchpoint Read Enable */
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#define DCU_VW _AC(0x0000000000200000,UL) /* VA Watchpoint Write Enable*/
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#define DCU_DM _AC(0x0000000000000008,UL) /* DMMU Enable */
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#define DCU_IM _AC(0x0000000000000004,UL) /* IMMU Enable */
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#define DCU_DC _AC(0x0000000000000002,UL) /* Data Cache Enable */
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#define DCU_IC _AC(0x0000000000000001,UL) /* Instruction Cache Enable */
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#endif /* _SPARC64_DCU_H */
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