threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
69 lines
2.1 KiB
C
69 lines
2.1 KiB
C
/*
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* Interface for smsc fdc48m81x Super IO chip
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*
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* Author: MontaVista Software, Inc. source@mvista.com
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*
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* 2001-2003 (c) MontaVista Software, Inc. This file is licensed under
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* the terms of the GNU General Public License version 2. This program
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* is licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*
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* Copyright (C) 2004 MontaVista Software Inc.
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* Manish Lachwani, mlachwani@mvista.com
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*/
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#ifndef _SMSC_FDC37M81X_H_
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#define _SMSC_FDC37M81X_H_
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/* Common Registers */
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#define SMSC_FDC37M81X_CONFIG_INDEX 0x00
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#define SMSC_FDC37M81X_CONFIG_DATA 0x01
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#define SMSC_FDC37M81X_CONF 0x02
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#define SMSC_FDC37M81X_INDEX 0x03
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#define SMSC_FDC37M81X_DNUM 0x07
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#define SMSC_FDC37M81X_DID 0x20
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#define SMSC_FDC37M81X_DREV 0x21
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#define SMSC_FDC37M81X_PCNT 0x22
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#define SMSC_FDC37M81X_PMGT 0x23
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#define SMSC_FDC37M81X_OSC 0x24
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#define SMSC_FDC37M81X_CONFPA0 0x26
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#define SMSC_FDC37M81X_CONFPA1 0x27
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#define SMSC_FDC37M81X_TEST4 0x2B
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#define SMSC_FDC37M81X_TEST5 0x2C
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#define SMSC_FDC37M81X_TEST1 0x2D
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#define SMSC_FDC37M81X_TEST2 0x2E
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#define SMSC_FDC37M81X_TEST3 0x2F
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/* Logical device numbers */
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#define SMSC_FDC37M81X_FDD 0x00
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#define SMSC_FDC37M81X_PARALLEL 0x03
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#define SMSC_FDC37M81X_SERIAL1 0x04
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#define SMSC_FDC37M81X_SERIAL2 0x05
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#define SMSC_FDC37M81X_KBD 0x07
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#define SMSC_FDC37M81X_AUXIO 0x08
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#define SMSC_FDC37M81X_NONE 0xff
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/* Logical device Config Registers */
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#define SMSC_FDC37M81X_ACTIVE 0x30
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#define SMSC_FDC37M81X_BASEADDR0 0x60
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#define SMSC_FDC37M81X_BASEADDR1 0x61
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#define SMSC_FDC37M81X_INT 0x70
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#define SMSC_FDC37M81X_INT2 0x72
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#define SMSC_FDC37M81X_LDCR_F0 0xF0
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/* Chip Config Values */
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#define SMSC_FDC37M81X_CONFIG_ENTER 0x55
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#define SMSC_FDC37M81X_CONFIG_EXIT 0xaa
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#define SMSC_FDC37M81X_CHIP_ID 0x4d
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unsigned long smsc_fdc37m81x_init(unsigned long port);
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void smsc_fdc37m81x_config_beg(void);
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void smsc_fdc37m81x_config_end(void);
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u8 smsc_fdc37m81x_config_get(u8 reg);
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void smsc_fdc37m81x_config_set(u8 reg, u8 val);
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#endif
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