threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
125 lines
2.3 KiB
C
125 lines
2.3 KiB
C
/*
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* linux/arch/arm/mach-w90x900/clock.c
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*
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* Copyright (c) 2008 Nuvoton technology corporation
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*
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* Wan ZongShun <mcuos.com@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/errno.h>
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#include <linux/err.h>
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#include <linux/string.h>
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#include <linux/clk.h>
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#include <linux/spinlock.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <mach/hardware.h>
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#include "clock.h"
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#define SUBCLK 0x24
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static DEFINE_SPINLOCK(clocks_lock);
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int clk_enable(struct clk *clk)
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{
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unsigned long flags;
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spin_lock_irqsave(&clocks_lock, flags);
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if (clk->enabled++ == 0)
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(clk->enable)(clk, 1);
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spin_unlock_irqrestore(&clocks_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(clk_enable);
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void clk_disable(struct clk *clk)
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{
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unsigned long flags;
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if (!clk)
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return;
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WARN_ON(clk->enabled == 0);
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spin_lock_irqsave(&clocks_lock, flags);
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if (--clk->enabled == 0)
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(clk->enable)(clk, 0);
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spin_unlock_irqrestore(&clocks_lock, flags);
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}
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EXPORT_SYMBOL(clk_disable);
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unsigned long clk_get_rate(struct clk *clk)
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{
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return 15000000;
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}
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EXPORT_SYMBOL(clk_get_rate);
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void nuc900_clk_enable(struct clk *clk, int enable)
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{
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unsigned int clocks = clk->cken;
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unsigned long clken;
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clken = __raw_readl(W90X900_VA_CLKPWR);
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if (enable)
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clken |= clocks;
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else
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clken &= ~clocks;
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__raw_writel(clken, W90X900_VA_CLKPWR);
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}
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void nuc900_subclk_enable(struct clk *clk, int enable)
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{
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unsigned int clocks = clk->cken;
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unsigned long clken;
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clken = __raw_readl(W90X900_VA_CLKPWR + SUBCLK);
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if (enable)
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clken |= clocks;
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else
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clken &= ~clocks;
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__raw_writel(clken, W90X900_VA_CLKPWR + SUBCLK);
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}
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/* dummy functions, should not be called */
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long clk_round_rate(struct clk *clk, unsigned long rate)
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{
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WARN_ON(clk);
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return 0;
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}
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EXPORT_SYMBOL(clk_round_rate);
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int clk_set_rate(struct clk *clk, unsigned long rate)
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{
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WARN_ON(clk);
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return 0;
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}
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EXPORT_SYMBOL(clk_set_rate);
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int clk_set_parent(struct clk *clk, struct clk *parent)
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{
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WARN_ON(clk);
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return 0;
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}
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EXPORT_SYMBOL(clk_set_parent);
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struct clk *clk_get_parent(struct clk *clk)
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{
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WARN_ON(clk);
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return NULL;
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}
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EXPORT_SYMBOL(clk_get_parent);
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