threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
41 lines
1.1 KiB
ArmAsm
41 lines
1.1 KiB
ArmAsm
/*
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* arch/arm/include/debug/ks8695.S
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*
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* Copyright (C) 2006 Ben Dooks <ben@simtec.co.uk>
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* Copyright (C) 2006 Simtec Electronics
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*
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* KS8695 - Debug macros
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#define KS8695_UART_PA 0x03ffe000
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#define KS8695_UART_VA 0xf00fe000
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#define KS8695_URTH (0x04)
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#define KS8695_URLS (0x14)
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#define URLS_URTE (1 << 6)
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#define URLS_URTHRE (1 << 5)
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.macro addruart, rp, rv, tmp
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ldr \rp, =KS8695_UART_PA @ physical base address
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ldr \rv, =KS8695_UART_VA @ virtual base address
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.endm
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.macro senduart, rd, rx
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str \rd, [\rx, #KS8695_URTH] @ Write to Transmit Holding Register
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.endm
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.macro busyuart, rd, rx
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1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register
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tst \rd, #URLS_URTE @ Holding & Shift registers empty?
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beq 1001b
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.endm
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.macro waituart, rd, rx
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1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register
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tst \rd, #URLS_URTHRE @ Holding Register empty?
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beq 1001b
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.endm
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