threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
37 lines
1.2 KiB
Plaintext
37 lines
1.2 KiB
Plaintext
NVIDIA Tegra 20 AC97 controller
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Required properties:
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- compatible : "nvidia,tegra20-ac97"
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- reg : Should contain AC97 controller registers location and length
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- interrupts : Should contain AC97 interrupt
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- resets : Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names : Must include the following entries:
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- ac97
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- dmas : Must contain an entry for each entry in clock-names.
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See ../dma/dma.txt for details.
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- dma-names : Must include the following entries:
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- rx
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- tx
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- clocks : Must contain one entry, for the module clock.
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See ../clocks/clock-bindings.txt for details.
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- nvidia,codec-reset-gpio : The Tegra GPIO controller's phandle and the number
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of the GPIO used to reset the external AC97 codec
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- nvidia,codec-sync-gpio : The Tegra GPIO controller's phandle and the number
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of the GPIO corresponding with the AC97 DAP _FS line
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Example:
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ac97@70002000 {
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compatible = "nvidia,tegra20-ac97";
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reg = <0x70002000 0x200>;
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interrupts = <0 81 0x04>;
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nvidia,codec-reset-gpio = <&gpio 170 0>;
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nvidia,codec-sync-gpio = <&gpio 120 0>;
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clocks = <&tegra_car 3>;
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resets = <&tegra_car 3>;
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reset-names = "ac97";
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dmas = <&apbdma 12>, <&apbdma 12>;
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dma-names = "rx", "tx";
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};
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