threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
38 lines
1006 B
Plaintext
38 lines
1006 B
Plaintext
Device Tree Clock bindings for ZTE zx296718
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This binding uses the common clock binding[1].
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[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
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Required properties:
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- compatible : shall be one of the following:
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"zte,zx296718-topcrm":
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zx296718 top clock selection, divider and gating
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"zte,zx296718-lsp0crm" and
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"zte,zx296718-lsp1crm":
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zx296718 device level clock selection and gating
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"zte,zx296718-audiocrm":
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zx296718 audio clock selection, divider and gating
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- reg: Address and length of the register set
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The clock consumer should specify the desired clock by having the clock
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ID in its "clocks" phandle cell. See include/dt-bindings/clock/zx296718-clock.h
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for the full list of zx296718 clock IDs.
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topclk: topcrm@1461000 {
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compatible = "zte,zx296718-topcrm-clk";
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reg = <0x01461000 0x1000>;
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#clock-cells = <1>;
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};
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usbphy0:usb-phy0 {
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compatible = "zte,zx296718-usb-phy";
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#phy-cells = <0>;
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clocks = <&topclk USB20_PHY_CLK>;
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clock-names = "phyclk";
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};
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