threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
74 lines
2.3 KiB
C
74 lines
2.3 KiB
C
/*
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* adc.h -- Driver for NXP PCF50633 ADC
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*
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* (C) 2006-2008 by Openmoko, Inc.
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __LINUX_MFD_PCF50633_ADC_H
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#define __LINUX_MFD_PCF50633_ADC_H
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#include <linux/mfd/pcf50633/core.h>
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#include <linux/platform_device.h>
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/* ADC Registers */
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#define PCF50633_REG_ADCC3 0x52
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#define PCF50633_REG_ADCC2 0x53
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#define PCF50633_REG_ADCC1 0x54
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#define PCF50633_REG_ADCS1 0x55
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#define PCF50633_REG_ADCS2 0x56
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#define PCF50633_REG_ADCS3 0x57
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#define PCF50633_ADCC1_ADCSTART 0x01
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#define PCF50633_ADCC1_RES_8BIT 0x02
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#define PCF50633_ADCC1_RES_10BIT 0x00
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#define PCF50633_ADCC1_AVERAGE_NO 0x00
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#define PCF50633_ADCC1_AVERAGE_4 0x04
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#define PCF50633_ADCC1_AVERAGE_8 0x08
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#define PCF50633_ADCC1_AVERAGE_16 0x0c
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#define PCF50633_ADCC1_MUX_BATSNS_RES 0x00
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#define PCF50633_ADCC1_MUX_BATSNS_SUBTR 0x10
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#define PCF50633_ADCC1_MUX_ADCIN2_RES 0x20
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#define PCF50633_ADCC1_MUX_ADCIN2_SUBTR 0x30
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#define PCF50633_ADCC1_MUX_BATTEMP 0x60
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#define PCF50633_ADCC1_MUX_ADCIN1 0x70
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#define PCF50633_ADCC1_AVERAGE_MASK 0x0c
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#define PCF50633_ADCC1_ADCMUX_MASK 0xf0
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#define PCF50633_ADCC2_RATIO_NONE 0x00
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#define PCF50633_ADCC2_RATIO_BATTEMP 0x01
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#define PCF50633_ADCC2_RATIO_ADCIN1 0x02
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#define PCF50633_ADCC2_RATIO_BOTH 0x03
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#define PCF50633_ADCC2_RATIOSETTL_100US 0x04
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#define PCF50633_ADCC3_ACCSW_EN 0x01
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#define PCF50633_ADCC3_NTCSW_EN 0x04
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#define PCF50633_ADCC3_RES_DIV_TWO 0x10
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#define PCF50633_ADCC3_RES_DIV_THREE 0x00
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#define PCF50633_ADCS3_REF_NTCSW 0x00
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#define PCF50633_ADCS3_REF_ACCSW 0x10
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#define PCF50633_ADCS3_REF_2V0 0x20
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#define PCF50633_ADCS3_REF_VISA 0x30
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#define PCF50633_ADCS3_REF_2V0_2 0x70
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#define PCF50633_ADCS3_ADCRDY 0x80
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#define PCF50633_ADCS3_ADCDAT1L_MASK 0x03
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#define PCF50633_ADCS3_ADCDAT2L_MASK 0x0c
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#define PCF50633_ADCS3_ADCDAT2L_SHIFT 2
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#define PCF50633_ASCS3_REF_MASK 0x70
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extern int
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pcf50633_adc_async_read(struct pcf50633 *pcf, int mux, int avg,
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void (*callback)(struct pcf50633 *, void *, int),
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void *callback_param);
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extern int
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pcf50633_adc_sync_read(struct pcf50633 *pcf, int mux, int avg);
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#endif /* __LINUX_PCF50633_ADC_H */
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