threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
53 lines
1.2 KiB
C
53 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _MC6821_H_
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#define _MC6821_H_
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/*
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* This file describes the memery mapping of the MC6821 PIA.
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* The unions describe overlayed registers. Which of them is used is
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* determined by bit 2 of the corresponding control register.
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* this files expects the PIA_REG_PADWIDTH to be defined the numeric
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* value of the register spacing.
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*
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* Data came from MFC-31-Developer Kit (from Ralph Seidel,
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* zodiac@darkness.gun.de) and Motorola Data Sheet (from
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* Richard Hirst, srh@gpt.co.uk)
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*
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* 6.11.95 copyright Joerg Dorchain (dorchain@mpi-sb.mpg.de)
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*
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*/
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#ifndef PIA_REG_PADWIDTH
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#define PIA_REG_PADWIDTH 255
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#endif
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struct pia {
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union {
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volatile u_char pra;
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volatile u_char ddra;
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} ua;
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u_char pad1[PIA_REG_PADWIDTH];
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volatile u_char cra;
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u_char pad2[PIA_REG_PADWIDTH];
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union {
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volatile u_char prb;
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volatile u_char ddrb;
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} ub;
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u_char pad3[PIA_REG_PADWIDTH];
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volatile u_char crb;
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u_char pad4[PIA_REG_PADWIDTH];
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};
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#define ppra ua.pra
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#define pddra ua.ddra
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#define pprb ub.prb
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#define pddrb ub.ddrb
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#define PIA_C1_ENABLE_IRQ (1<<0)
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#define PIA_C1_LOW_TO_HIGH (1<<1)
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#define PIA_DDR (1<<2)
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#define PIA_IRQ2 (1<<6)
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#define PIA_IRQ1 (1<<7)
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#endif
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