threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
662 lines
16 KiB
C
662 lines
16 KiB
C
/*
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* Copyright (C) 2016 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/version.h>
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#include <linux/kernel.h>
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#include <linux/sched.h>
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#include <linux/kthread.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/proc_fs.h>
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#include <linux/string.h>
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#include <linux/uaccess.h>
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#include <linux/spinlock.h>
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#include <linux/rtc.h>
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#include <linux/cpu.h>
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#include <linux/hrtimer.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/irq.h>
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#include <linux/proc_fs.h>
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#include <linux/syscore_ops.h>
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#include <asm/sched_clock.h>
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#include <linux/version.h>
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#include <mach/mt_reg_base.h>
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#include <mach/mt_gpt.h>
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#include <mach/mt_timer.h>
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#include <mach/irqs.h>
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#include <mach/mt_cpuxgpt.h>
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#include <mach/ext_wd_drv.h>
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#if 0 /*this file only to do HW test*/
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/* extern int nr_cpu_ids; */
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/* int enable_clock(int id, unsigned char *name); */
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static int test_case;
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static int ts_msleep;
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static int msleep_times;
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static int ts_mdelay;
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static int mdelay_times;
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static int ts_udelay;
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static int udelay_times;
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static long ts_hrtimer_sec;
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static unsigned long ts_hrtimer_nsecs;
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static int ts_hrtimer_times;
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static struct hrtimer hrtimer_test;
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u64 hr_t1;
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u64 hr_t2;
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module_param(test_case, int, 0664);
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module_param(ts_msleep, int, 0664);
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module_param(msleep_times, int, 0664);
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module_param(ts_mdelay, int, 0664);
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module_param(mdelay_times, int, 0664);
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module_param(ts_udelay, int, 0664);
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module_param(udelay_times, int, 0664);
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module_param(ts_hrtimer_sec, int, 0664);
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module_param(ts_hrtimer_nsecs, int, 0664);
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module_param(ts_hrtimer_times, int, 0664);
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static DEFINE_SPINLOCK(wdt_test_lock0);
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static DEFINE_SPINLOCK(wdt_test_lock1);
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static struct task_struct *wk_tsk[2];/* cpu: 2 */
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static int data;
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static int hrtimer_test_case(void);
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static int __cpuinit
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cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu)
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{
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int hotcpu = (unsigned long)hcpu;
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switch (action) {
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case CPU_UP_PREPARE:
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case CPU_UP_PREPARE_FROZEN:
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/* watchdog_prepare_cpu(hotcpu); */
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break;
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case CPU_ONLINE:
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case CPU_ONLINE_FROZEN:
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/* */
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if (hotcpu < nr_cpu_ids) {
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kthread_bind(wk_tsk[hotcpu], hotcpu);
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wake_up_process(wk_tsk[hotcpu]);
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pr_debug("[WDK-test]cpu %d plug on ", hotcpu);
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}
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break;
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#ifdef CONFIG_HOTPLUG_CPU
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case CPU_UP_CANCELED:
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case CPU_UP_CANCELED_FROZEN:
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case CPU_DEAD:
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case CPU_DEAD_FROZEN:
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pr_debug("[WDK-test]:start Stop CPU:%d\n", hotcpu);
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break;
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#endif /* CONFIG_HOTPLUG_CPU */
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}
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/*
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* hardlockup and softlockup are not important enough
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* to block cpu bring up. Just always succeed and
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* rely on printk output to flag problems.
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*/
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return NOTIFY_OK;
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}
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static struct notifier_block cpu_nfb __cpuinitdata = {
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.notifier_call = cpu_callback
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};
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static int msleep_test(int length, int times)
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{
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u64 t1 = 0;
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u64 t2 = 0;
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int i = 0;
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t1 = sched_clock();
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for (i = 0; i < times; i++)
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msleep(length);
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t2 = sched_clock();
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pr_debug("%s, msleep(%d) test %d times\n",
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__func__, length, times);
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pr_debug("%s: t1 =%lld, t2=%lld, delta=%lld\n",
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__func__, t1, t2, t2-t1);
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}
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static int udelay_test(int length, int times)
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{
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u64 t1 = 0;
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u64 t2 = 0;
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int i = 0;
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t1 = sched_clock();
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for (i = 0; i < times; i++)
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udelay(length);
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t2 = sched_clock();
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pr_debug("%s, %s(%d) test %d times\n",
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__func__, __func__, length, times);
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pr_debug("%s :t1 =%lld, t2=%lld, delta=%lld\n",
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__func__, t1, t2, t2-t1);
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}
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static int mdelay_test(int length, int times)
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{
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u64 t1 = 0;
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u64 t2 = 0;
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int i = 0;
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t1 = sched_clock();
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for (i = 0; i < times; i++)
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mdelay(length);
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t2 = sched_clock();
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pr_debug("%s, %s(%d) test %d times\n",
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__func__, __func__, length, times);
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pr_debug("%s:t1 =%lld, t2=%lld, delta=%lld\n",
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__func__, t1, t2, t2-t1);
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}
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#define read_cntpct(cntpct_lo, cntpct_hi) \
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__asm__ __volatile__( \
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"MRRC p15, 0, %0, %1, c14\n" \
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: "=r"(cntpct_lo), "=r"(cntpct_hi) \
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: \
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: "memory"); \
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static int phycical_count_test(void)
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{
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unsigned int cntpct_lo1 = 0;
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unsigned int cntpct_hi1 = 0;
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unsigned int cntpct_lo2 = 0;
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unsigned int cntpct_hi2 = 0;
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pr_debug("%s start\n", __func__);
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while (1) {
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read_cntpct(cntpct_lo1, cntpct_hi1);
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read_cntpct(cntpct_lo2, cntpct_hi2);
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if (cntpct_hi2 == cntpct_hi1) {
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if (cntpct_lo2 < cntpct_lo1) {
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if (cntpct_lo1 == 0xffff) {
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pr_debug("fwq 0 by pass bug cntpct_hi1=%u,cntpct_lo1=%u, cntpct_hi2=%u,cntpct_lo2=%u\n",
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cntpct_hi1, cntpct_lo1,
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cntpct_hi2, cntpct_lo2);
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continue;
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}
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pr_debug("fwq 1 cntpct_hi1=%d,cntpct_lo1=%d, cntpct_hi2=%d,cntpct_lo2=%d\n",
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cntpct_hi1, cntpct_lo1,
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cntpct_hi2, cntpct_lo2);
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/* break; */
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}
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}
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if (cntpct_hi2 < cntpct_hi1) {
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pr_debug("fwq 2 cntpct_hi1=%d,cntpct_lo1=%d, cntpct_hi2=%d,cntpct_lo2=%d\n",
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cntpct_hi1, cntpct_lo1,
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cntpct_hi2, cntpct_lo2);
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/* break; */
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}
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}
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pr_debug("%s end\n", __func__);
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}
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#define GPT_IRQEN (APXGPT_BASE + 0x0000)
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#define GPT_IRQSTA (APXGPT_BASE + 0x0004)
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#define GPT_IRQACK (APXGPT_BASE + 0x0008)
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static int dump_gpt_reg(void)
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{
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pr_debug("IRQ STA %x\n", DRV_Reg32(GPT_IRQSTA));
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pr_debug("IRQ EN %x\n", DRV_Reg32(GPT_IRQEN));
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pr_debug("IRQ ACK %x\n", DRV_Reg32(GPT_IRQACK));
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pr_debug("GPT3 clk %x\n", DRV_Reg32(0xF0008034));
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pr_debug("GPT3 con %x\n", DRV_Reg32(0xF0008030));
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pr_debug("GPT3 count %x\n", DRV_Reg32(0xF0008038));
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pr_debug("GPT3 cmp %x\n", DRV_Reg32(0xF000803c));
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}
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static int dump_gpt1_reg(void)
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{
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pr_debug("IRQ STA %x\n", DRV_Reg32(GPT_IRQSTA));
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pr_debug("IRQ EN %x\n", DRV_Reg32(GPT_IRQEN));
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pr_debug("IRQ ACK %x\n", DRV_Reg32(GPT_IRQACK));
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pr_debug("GPT3 clk %x\n", DRV_Reg32(0xF0008014));
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pr_debug("GPT3 con %x\n", DRV_Reg32(0xF0008010));
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pr_debug("GPT3 count %x\n", DRV_Reg32(0xF0008018));
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pr_debug("GPT3 cmp %x\n", DRV_Reg32(0xF000801c));
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}
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u64 cpuxgpt_t1;
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u64 cpuxgpt_t2;
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int g_cpuxgpt0_called;
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int g_cpuxgpt1_called;
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int g_cpuxgpt2_called;
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static irqreturn_t cpuxgpt_test_irq_handler(int irq, void *dev_id)
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{
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cpuxgpt_t2 = sched_clock();
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g_cpuxgpt0_called = 1;
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pr_debug("cpuxgpt irq:%d called\n", irq);
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pr_debug("cpuxgpt t2(%lld),t1(%lld),delta(%lld)\n",
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cpuxgpt_t2, cpuxgpt_t1, cpuxgpt_t2-cpuxgpt_t1);
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return IRQ_HANDLED;
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}
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#if 1
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static irqreturn_t cpuxgpt1_test_irq_handler(int irq, void *dev_id)
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{
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g_cpuxgpt1_called = 1;
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pr_debug("cpuxgpt1 irq called\n");
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return IRQ_HANDLED;
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}
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static irqreturn_t cpuxgpt2_test_irq_handler(int irq, void *dev_id)
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{
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g_cpuxgpt2_called = 1;
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pr_debug("cpuxgpt2 irq called\n");
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return IRQ_HANDLED;
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}
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static irqreturn_t cpuxgpt3_test_irq_handler(int irq, void *dev_id)
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{
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pr_debug("cpuxgpt3 irq called\n");
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return IRQ_HANDLED;
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}
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static irqreturn_t cpuxgpt4_test_irq_handler(int irq, void *dev_id)
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{
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pr_debug("cpuxgpt4 irq called\n");
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return IRQ_HANDLED;
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}
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static irqreturn_t cpuxgpt5_test_irq_handler(int irq, void *dev_id)
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{
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pr_debug("cpuxgpt5 irq called\n");
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return IRQ_HANDLED;
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}
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static irqreturn_t cpuxgpt6_test_irq_handler(int irq, void *dev_id)
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{
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pr_debug("cpuxgpt6 irq called\n");
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return IRQ_HANDLED;
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}
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static irqreturn_t cpuxgpt7_test_irq_handler(int irq, void *dev_id)
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{
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pr_debug("cpuxgpt7 irq called\n");
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return IRQ_HANDLED;
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}
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#endif
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void generic_timer_ppi_check(void)
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{
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disable_cpuxgpt();
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cpu_xgpt_set_init_count(0x80000000, 0xffffff00);
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enable_cpuxgpt();
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}
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static cpuxgpt_X_interrupt_test(int cpu)
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{
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disable_cpuxgpt();
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cpu_xgpt_set_init_count(0x80000000, 0xffffff00);
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/* cpu_xgpt_register_timer(cpu,cpuxgpt_test_irq_handler); */
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cpu_xgpt_register_timer(1, cpuxgpt1_test_irq_handler);
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cpu_xgpt_register_timer(2, cpuxgpt2_test_irq_handler);
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cpu_xgpt_register_timer(3, cpuxgpt3_test_irq_handler);
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cpu_xgpt_register_timer(4, cpuxgpt4_test_irq_handler);
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cpu_xgpt_register_timer(5, cpuxgpt5_test_irq_handler);
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cpu_xgpt_register_timer(6, cpuxgpt6_test_irq_handler);
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cpu_xgpt_register_timer(7, cpuxgpt7_test_irq_handler);
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/* */
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cpu_xgpt_set_cmp_HL(cpu, 0x80000001, 0x00000100);
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cpuxgpt_t1 = sched_clock();
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enable_cpuxgpt();
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/* wait for interrupt trigger, */
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/* timeout:(0,0x80000001,0x00000100) - (0x80000000,0xffffff00) */
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msleep(20);
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}
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static cpuxgpt_interrupt_test(void)
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{
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int i = 0;
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/* for(i = 0; i < 8; i++) */
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/* { */
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cpuxgpt_X_interrupt_test(i);
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/* } */
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/* test_case = 0; */
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}
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static void cpuxgpt_frequency_test(void)
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{
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/* long long delta1 = 0; */
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/* long long delta2 = 0; */
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/* div1 */
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#define TIMEOUT (13000000) /* 1s = 13M */
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set_cpuxgpt_clk(CLK_DIV2);
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disable_cpuxgpt();
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cpu_xgpt_set_init_count(0x00000000, 0x00000000);
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/* set_cpuxgpt_clk(CLK_DIV1); */
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cpu_xgpt_register_timer(0, cpuxgpt_test_irq_handler);
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cpu_xgpt_set_cmp_HL(0, 0x00000000, TIMEOUT);
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cpuxgpt_t1 = sched_clock();
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set_cpuxgpt_clk(CLK_DIV1);
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enable_cpuxgpt();
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while (g_cpuxgpt0_called == 0) {
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msleep(20);
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pr_debug("busy wait\n");
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}
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g_cpuxgpt0_called = 0;
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pr_debug("cpuxgpt0-div1 t2(%lld),t1(%lld),delta(%lld)\n", cpuxgpt_t2,
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cpuxgpt_t1, cpuxgpt_t2-cpuxgpt_t1);
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#if 1
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msleep(1000);
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/* div2 */
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disable_cpuxgpt();
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cpu_xgpt_set_init_count(0x00000000, 0x00000000);
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/* set_cpuxgpt_clk(CLK_DIV2); */
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cpu_xgpt_set_cmp_HL(0, 0x00000000, TIMEOUT);
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cpuxgpt_t1 = sched_clock();
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set_cpuxgpt_clk(CLK_DIV2);
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enable_cpuxgpt();
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while (g_cpuxgpt0_called == 0) {
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msleep(20);
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pr_debug("busy wait\n");
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}
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g_cpuxgpt0_called = 0;
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pr_debug("cpuxgpt0-div2 t2(%lld),t1(%lld),delta(%lld)\n", cpuxgpt_t2,
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cpuxgpt_t1, cpuxgpt_t2-cpuxgpt_t1);
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msleep(1000);
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/* div3 */
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disable_cpuxgpt();
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cpu_xgpt_set_init_count(0x00000000, 0x00000000);
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/* set_cpuxgpt_clk(CLK_DIV4); */
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cpu_xgpt_set_cmp_HL(0, 0x00000000, TIMEOUT);
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cpuxgpt_t1 = sched_clock();
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set_cpuxgpt_clk(CLK_DIV4);
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enable_cpuxgpt();
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while (g_cpuxgpt0_called == 0) {
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msleep(20);
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pr_debug("busy wait\n");
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}
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g_cpuxgpt0_called = 0;
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pr_debug("cpuxgpt0-div4 t2(%lld),t1(%lld),delta(%lld)\n", cpuxgpt_t2,
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cpuxgpt_t1, cpuxgpt_t2-cpuxgpt_t1);
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#endif
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}
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void cpuxgpt_halt_on_debug_test(void)
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{
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unsigned int cntpct_lo1 = 0;
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unsigned int cntpct_hi1 = 0;
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disable_cpuxgpt();
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cpu_xgpt_set_init_count(0x00000000, 0x00000000);
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set_cpuxgpt_clk(CLK_DIV1);
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enable_cpuxgpt();
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cpu_xgpt_halt_on_debug_en(1);
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/*
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* read_cntpct(cntpct_lo1, cntpct_hi1);
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* localtimer_get_phy_count();
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* read_cntpct(cntpct_lo1, cntpct_hi1);
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* localtimer_get_phy_count();
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* pr_debug("11111 ca7 counter(%u,%u) == %lld\n", cntpct_hi1,cntpct_lo1,
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* localtimer_get_phy_count() );
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*
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*
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* read_cntpct(cntpct_lo1, cntpct_hi1);
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* pr_debug("22222 ca7 counter(%u,%u) == %lld\n", cntpct_hi1,cntpct_lo1,
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* localtimer_get_phy_count() );
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* read_cntpct(cntpct_lo1, cntpct_hi1);
|
|
* pr_debug("33333 ca7 counter(%u,%u) == %lld\n", cntpct_hi1,cntpct_lo1,
|
|
* localtimer_get_phy_count() );
|
|
* read_cntpct(cntpct_lo1, cntpct_hi1);
|
|
* pr_debug("44444 ca7 counter(%u,%u) == %lld\n", cntpct_hi1,cntpct_lo1,
|
|
* localtimer_get_phy_count() );
|
|
*/
|
|
|
|
}
|
|
|
|
static void cpuxgpt_test_case_help(void)
|
|
{
|
|
pr_debug("1:cpuxgpt_interrupt_test\n");
|
|
pr_debug("2:cpuxgpt_frequency_test\n");
|
|
pr_debug("3: cpuxgpt_halt_on_debug_test\n");
|
|
|
|
}
|
|
|
|
void cpuxgpt_run_case(int testcase)
|
|
{
|
|
switch (testcase) {
|
|
case 0:
|
|
cpuxgpt_test_case_help();
|
|
break;
|
|
case 1:
|
|
cpuxgpt_interrupt_test();
|
|
break;
|
|
case 2:
|
|
cpuxgpt_frequency_test();
|
|
break;
|
|
case 3:
|
|
cpuxgpt_halt_on_debug_test();
|
|
break;
|
|
case 4:
|
|
generic_timer_ppi_check();
|
|
break;
|
|
default:
|
|
pr_debug("[%s] invalid testcase\n", __func__);
|
|
}
|
|
test_case = 0;
|
|
}
|
|
|
|
static int idx;
|
|
static int ktimer_thread_test(void *arg)
|
|
{
|
|
struct sched_param param = { .sched_priority = RTPM_PRIO_WDT};
|
|
int cpu;
|
|
unsigned int flags;
|
|
int ret = 0;
|
|
unsigned int cntpct_lo1 = 0;
|
|
unsigned int cntpct_hi1 = 0;
|
|
static unsigned int last_cntpct_lo1;
|
|
static unsigned int last_cntpct_hi1;
|
|
int i = 0;
|
|
|
|
sched_setscheduler(current, SCHED_FIFO, ¶m);
|
|
set_current_state(TASK_INTERRUPTIBLE);
|
|
|
|
for (;;) {
|
|
spin_lock(&wdt_test_lock0);
|
|
cpu = smp_processor_id();
|
|
spin_unlock(&wdt_test_lock0);
|
|
pr_debug("timer test debug start, cpu:%d\n", cpu);
|
|
/* phycical_count_test(); */
|
|
cpuxgpt_run_case(test_case);
|
|
|
|
if (ts_msleep != 0) {
|
|
/* pr_debug("CPU:%d, msleep(%d) test\n", cpu,ts_msleep); */
|
|
if (msleep_times != 0) {
|
|
msleep_test(ts_msleep, msleep_times);
|
|
else
|
|
msleep_test(ts_msleep, 1);
|
|
}
|
|
|
|
if (ts_mdelay != 0) {
|
|
/* pr_debug("CPU:%d, mdelay(%d) test\n", cpu,ts_mdelay); */
|
|
if (mdelay_times != 0) {
|
|
mdelay_test(ts_mdelay, mdelay_times);
|
|
else
|
|
mdelay_test(ts_mdelay, 1);
|
|
}
|
|
|
|
if (ts_udelay != 0) {
|
|
/* pr_debug("CPU:%d, udelay(%d) test\n", cpu,ts_udelay); */
|
|
if (udelay_times != 0)
|
|
udelay_test(ts_udelay, udelay_times);
|
|
else
|
|
udelay_test(ts_udelay, 1);
|
|
}
|
|
|
|
if (ts_hrtimer_nsecs != 0 || ts_hrtimer_sec != 0)
|
|
hrtimer_test_case();
|
|
|
|
msleep(5*1000);/* 5s */
|
|
|
|
read_cntpct(cntpct_lo1, cntpct_hi1);
|
|
pr_debug("ca7 counter(%u,%u) == %lld\n", cntpct_hi1, cntpct_lo1,
|
|
localtimer_get_phy_count());
|
|
|
|
/* pr_debug("cpuxgpt(%d) set 100ms timer,idx=%d\n" ,idx%8,idx); */
|
|
/* cpu_xgpt_set_timer(idx%8,100000000); */
|
|
/* idx++; */
|
|
|
|
pr_debug("timer test debug end, cpu:%d\n", cpu);
|
|
#if 0
|
|
pr_debug("fwq2 before set\n");
|
|
dump_gpt_reg();
|
|
pr_debug("set gpt3 5s oneshot\n");
|
|
|
|
DRV_WriteReg32(0xF0008000, 0x7);
|
|
DRV_WriteReg32(0xF0008030, 0x0);
|
|
|
|
DRV_WriteReg32(0xF0008038, 0x0);
|
|
DRV_WriteReg32(0xF0008034, 0x0);
|
|
DRV_WriteReg32(0xF000803c, 0x1c9c380);
|
|
|
|
DRV_WriteReg32(0xF0008030, 0x3);
|
|
|
|
read_cntpct(cntpct_lo1, cntpct_hi1);
|
|
if (cntpct_hi1 == last_cntpct_hi1 && cntpct_lo1 == last_cntpct_lo1)
|
|
pr_debug("fwq local count error !!!\n");
|
|
last_cntpct_hi1 = cntpct_hi1;
|
|
last_cntpct_lo1 = cntpct_lo1;
|
|
pr_debug("ca7 counter(%u,%u), cpu:%d\n", cntpct_hi1, cntpct_lo1);
|
|
pr_debug("timer test debug end, cpu:%d\n", cpu);
|
|
#endif
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static enum hrtimer_restart hrtimer_test_func(struct hrtimer *timer)
|
|
{
|
|
hr_t2 = sched_clock();
|
|
pr_debug("[%s] t1=%lld,t2 =%lld\n", __func__, hr_t1, hr_t2);
|
|
pr_debug("[%s] delta=%lld\n", __func__, hr_t2-hr_t1);
|
|
return HRTIMER_NORESTART;
|
|
}
|
|
|
|
static int hrtimer_test_case(void)
|
|
{
|
|
int ret = 0;
|
|
int value = 0;
|
|
|
|
pr_debug("%s:ts_hrtimer_sec=%ld, ts_hrtimer_nsecs=%ld\n",
|
|
__func__, ts_hrtimer_sec, ts_hrtimer_nsecs);
|
|
hr_t1 = sched_clock();
|
|
hrtimer_start(&hrtimer_test,
|
|
ktime_set(ts_hrtimer_sec, ts_hrtimer_nsecs),
|
|
HRTIMER_MODE_REL);
|
|
|
|
}
|
|
static int start_kicker(void)
|
|
{
|
|
|
|
int i;
|
|
unsigned char name[15] = {0};
|
|
|
|
hrtimer_init(&hrtimer_test, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
|
|
hrtimer_test.function = hrtimer_test_func;
|
|
|
|
for (i = 0; i < 1; i++) {
|
|
sprintf(name, "timer-test%d", i);
|
|
pr_debug("[Timer]:thread name: %s\n", name);
|
|
wk_tsk[i] = kthread_create(ktimer_thread_test, &data, name);
|
|
if (IS_ERR(wk_tsk[i])) {
|
|
int ret = PTR_ERR(wk_tsk[i]);
|
|
|
|
wk_tsk[i] = NULL;
|
|
return ret;
|
|
}
|
|
kthread_bind(wk_tsk[i], i);
|
|
wake_up_process(wk_tsk[i]);
|
|
}
|
|
return 0;
|
|
}
|
|
static int __init test_init(void)
|
|
{
|
|
/* enable_clock(12, "Vfifo"); */
|
|
|
|
/* register_cpu_notifier(&cpu_nfb); */
|
|
start_kicker();
|
|
return 0;
|
|
}
|
|
|
|
static void __init test_exit(void)
|
|
{
|
|
|
|
}
|
|
#if 0
|
|
int TimerUT_proc_init(void)
|
|
{
|
|
|
|
struct proc_dir_entry *de = create_proc_entry(PROC_WK, 0660, 0);
|
|
|
|
pr_debug("[WDK] Initialize proc\n");
|
|
|
|
de->read_proc = wk_proc_cmd_read;
|
|
de->write_proc = wk_proc_cmd_write;
|
|
|
|
return 0;
|
|
}
|
|
|
|
|
|
void TimerUT_proc_exit(void)
|
|
{
|
|
|
|
remove_proc_entry(PROC_WK, NULL);
|
|
|
|
}
|
|
#endif
|
|
module_init(test_init);
|
|
module_exit(test_exit);
|
|
#endif
|
|
|