Files
threeeye bc1d038eac REVVL 6 Pro kernel bring-up: full working tree snapshot (2026-09-12)
Squashed backup commit (no shallow-clone history issues) of
xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream
commit 9eece662e) plus all fixes applied to get everpal_defconfig building
clean against a modern (GCC 15.2.0) toolchain -- see the previous commit
message on the lineage-23.2 branch (also in this repo history is not
available here since this is a squashed snapshot; full incremental history
lives in the local DL380 checkout and the upstream GitHub remote).

Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
2026-09-12 13:36:46 +00:00

132 lines
3.1 KiB
C

/*
* Copyright (C) 2015 MediaTek Inc.
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/pm_qos.h>
#include <linux/delay.h>
#include <mt-plat/mtk_otp.h>
#include <mt-plat/upmu_common.h>
#include <linux/regulator/consumer.h>
#include "otp_pmic_config.h"
#define kal_uint32 unsigned int
static struct pm_qos_request dvfsrc_vcore_opp_req;
static struct regulator *reg_vcore;
static unsigned int org_volt;
/**************************************************************************
*EXTERN FUNCTION
**************************************************************************/
u32 otp_pmic_fsource_set(void)
{
u32 ret_val = 0;
/* 1.8V */
ret_val |= pmic_config_interface(
(kal_uint32)(PMIC_RG_VEFUSE_VOSEL_ADDR),
(kal_uint32)(0xC),
(kal_uint32)(PMIC_RG_VEFUSE_VOSEL_MASK),
(kal_uint32)(PMIC_RG_VEFUSE_VOSEL_SHIFT)
);
/* +0mV */
ret_val |= pmic_config_interface(
(kal_uint32)(PMIC_RG_VEFUSE_VOCAL_ADDR),
(kal_uint32)(0x0),
(kal_uint32)(PMIC_RG_VEFUSE_VOCAL_MASK),
(kal_uint32)(PMIC_RG_VEFUSE_VOCAL_SHIFT)
);
/* Fsource(VEFUSE) enabled */
ret_val |= pmic_config_interface(
(kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_ADDR),
(kal_uint32)(1),
(kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_MASK),
(kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_SHIFT));
mdelay(10);
return ret_val;
}
u32 otp_pmic_fsource_release(void)
{
u32 ret_val = 0;
/* Fsource(VEFUSE) disabled */
ret_val |= pmic_config_interface(
(kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_ADDR),
(kal_uint32)(0),
(kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_MASK),
(kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_SHIFT));
mdelay(10);
return ret_val;
}
u32 otp_pmic_is_fsource_enabled(void)
{
u32 regVal = 0;
/* Check Fsource(VEFUSE) Status */
pmic_read_interface((kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_ADDR),
&regVal,
(kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_MASK),
(kal_uint32)(PMIC_RG_LDO_VEFUSE_EN_SHIFT)
);
/* return 1 : fsource enabled
* return 0 : fsource disabled
*/
return regVal;
}
u32 otp_pmic_high_vcore_init(void)
{
reg_vcore = regulator_get(NULL, "vcore");
pm_qos_add_request(&dvfsrc_vcore_opp_req, PM_QOS_VCORE_OPP,
PM_QOS_VCORE_OPP_DEFAULT_VALUE);
return 0;
}
u32 otp_pmic_high_vcore_set(void)
{
/* opp 0 -> 0.725V */
pm_qos_update_request(&dvfsrc_vcore_opp_req, 0);
/* to 0.75V and save vcore */
if (reg_vcore) {
org_volt = regulator_get_voltage(reg_vcore);
regulator_set_voltage(reg_vcore, 750000,
750000);
}
return STATUS_DONE;
}
u32 otp_pmic_high_vcore_release(void)
{
/* restore vcore */
if (reg_vcore) {
regulator_set_voltage(reg_vcore, org_volt,
org_volt);
}
pm_qos_update_request(&dvfsrc_vcore_opp_req,
PM_QOS_VCORE_OPP_DEFAULT_VALUE);
return STATUS_DONE;
}