threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
77 lines
1.9 KiB
C
77 lines
1.9 KiB
C
/*
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* Copyright (C) 2015 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MMDVFS_PLAT_H__
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#define __MMDVFS_PLAT_H__
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#include "mmdvfs_pmqos.h"
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#define MAX_PORT_COUNT 32
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struct mm_larb_request {
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struct list_head larb_list; /* To search master setting of larb */
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bool larb_list_init;
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u32 port_count;
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u32 ratio[MAX_PORT_COUNT];
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s32 total_bw_data;
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s32 total_hrt_data;
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s32 total_mix_limit;
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s32 total_occupied;
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u32 comm_port;
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u32 channel;
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bool is_max_ostd;
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};
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void mmdvfs_update_qos_sram(struct mm_larb_request larb_req[], u32 larb_update);
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void mmdvfs_update_limit_config(enum mmdvfs_limit_source source,
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u32 source_value, u32 *limit_value, u32 *limit_level);
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bool mmdvfs_log_larb_mmp(s32 common_port_id, s32 larb_id);
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#define DEFAULT_BW_UPDATE(bw_value) ((bw_value) * 1 / 2)
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#define DEFAULT_LIMIT_UPDATE(bw_value) ((bw_value) * 7 / 10)
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#define VENC_BW_UPDATE(bw_value) ((bw_value) * 7 / 10)
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static inline u32 get_comp_value(u32 bw_value, u32 comp_type, bool is_bw)
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{
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if (comp_type == BW_COMP_DEFAULT) {
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if (is_bw)
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return DEFAULT_BW_UPDATE(bw_value);
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else
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return DEFAULT_LIMIT_UPDATE(bw_value);
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} else if (comp_type == BW_COMP_VENC) {
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if (is_bw)
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return VENC_BW_UPDATE(bw_value);
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else
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return bw_value;
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}
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return bw_value;
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}
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u32 mmdvfs_get_ccu_smi_common_port(u32 master_id);
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s32 get_ccu_hrt_bw(struct mm_larb_request larb_req[]);
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s32 get_md_hrt_bw(void);
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s32 emi_occ_ratio(void);
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s32 emi_occ_ui_only(void);
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s32 cam_occ_ratio(void);
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s32 disp_occ_ratio(void);
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s32 dram_write_weight(s32 val);
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#endif /* __MMDVFS_PLAT_H__ */
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