Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
94 lines
6.2 KiB
C
94 lines
6.2 KiB
C
/*
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* Copyright (C) 2015 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000100, 0x10107244)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000108, 0x10107044)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000110, 0x040a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000118, 0x0000f0d0)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000120, 0x08086048)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000124, 0x00000034)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000128, 0x0a0a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000130, 0x20207044)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x00000138, 0x20207044)
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SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_ICFP, 0x0000015c, 0x88410222)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000100, 0x10107244)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000108, 0x10107044)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000110, 0x040a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000118, 0x0000f0d0)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000120, 0x08086048)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000124, 0x00000034)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000128, 0x0a0a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000130, 0x20207044)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x00000138, 0x20207044)
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SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VPWFD, 0x0000015c, 0x88410222)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000100, 0x10107244)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000108, 0x10107044)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000110, 0x040a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000118, 0x0000f0d0)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000120, 0x08086048)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000124, 0x00000034)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000128, 0x0a0a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000130, 0x20207044)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x00000138, 0x20207044)
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SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_VR4K, 0x0000015c, 0x88410222)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000100, 0x08047250)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000108, 0x10107050)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000110, 0x0a0a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000118, 0x0000f0d0)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000120, 0x08086050)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000124, 0x00000034)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000128, 0x0a0a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000130, 0x20207048)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x00000138, 0x20207048)
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SET_BWL_CHN_REG(BWL_ENV_LPDDR4_2CH, BWL_SCN_UI, 0x0000015c, 0x82410222)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000100, 0x10107244)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000108, 0x10107044)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000110, 0x040a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000118, 0x0000f0d0)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000120, 0x08086048)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000124, 0x00000034)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000128, 0x0a0a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000130, 0x20207044)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x00000138, 0x20207044)
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SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_ICFP, 0x0000015c, 0x88410222)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000100, 0x10107244)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000108, 0x10107044)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000110, 0x040a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000118, 0x0000f0d0)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000120, 0x08086048)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000124, 0x00000034)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000128, 0x0a0a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000130, 0x20207044)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x00000138, 0x20207044)
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SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VPWFD, 0x0000015c, 0x88410222)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000100, 0x10107244)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000108, 0x10107044)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000110, 0x040a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000118, 0x0000f0d0)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000120, 0x08086048)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000124, 0x00000034)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000128, 0x0a0a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000130, 0x20207044)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x00000138, 0x20207044)
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SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_VR4K, 0x0000015c, 0x88410222)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000100, 0x08047250)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000108, 0x10107050)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000110, 0x0a0a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000118, 0x0000f0d0)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000120, 0x08086050)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000124, 0x00000034)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000128, 0x0a0a50df)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000130, 0x20207048)
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SET_BWL_CEN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x00000138, 0x20207048)
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SET_BWL_CHN_REG(BWL_ENV_LPDDR3_1CH, BWL_SCN_UI, 0x0000015c, 0x82410222)
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