threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
31 lines
1.2 KiB
C
31 lines
1.2 KiB
C
/*
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* cx18 interrupt handling
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*
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* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
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* Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define HW2_I2C1_INT (1 << 22)
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#define HW2_I2C2_INT (1 << 23)
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#define HW2_INT_CLR_STATUS 0xc730c4
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#define HW2_INT_MASK5_PCI 0xc730e4
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#define SW1_INT_SET 0xc73100
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#define SW1_INT_STATUS 0xc73104
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#define SW1_INT_ENABLE_PCI 0xc7311c
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#define SW2_INT_SET 0xc73140
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#define SW2_INT_STATUS 0xc73144
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#define SW2_INT_ENABLE_CPU 0xc73158
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#define SW2_INT_ENABLE_PCI 0xc7315c
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irqreturn_t cx18_irq_handler(int irq, void *dev_id);
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