threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
56 lines
1.3 KiB
ArmAsm
56 lines
1.3 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* dtlb_prot.S: DTLB protection trap strategy.
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* This is included directly into the trap table.
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*
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* Copyright (C) 1996,1998 David S. Miller (davem@redhat.com)
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* Copyright (C) 1997,1998 Jakub Jelinek (jj@ultra.linux.cz)
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*/
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/* Ways we can get here:
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*
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* [TL == 0] 1) User stores to readonly pages.
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* [TL == 0] 2) Nucleus stores to user readonly pages.
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* [TL > 0] 3) Nucleus stores to user readonly stack frame.
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*/
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/* PROT ** ICACHE line 1: User DTLB protection trap */
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mov TLB_SFSR, %g1
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stxa %g0, [%g1] ASI_DMMU ! Clear FaultValid bit
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membar #Sync ! Synchronize stores
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rdpr %pstate, %g5 ! Move into alt-globals
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wrpr %g5, PSTATE_AG|PSTATE_MG, %pstate
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rdpr %tl, %g1 ! Need a winfixup?
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cmp %g1, 1 ! Trap level >1?
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mov TLB_TAG_ACCESS, %g4 ! For reload of vaddr
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/* PROT ** ICACHE line 2: More real fault processing */
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ldxa [%g4] ASI_DMMU, %g5 ! Put tagaccess in %g5
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srlx %g5, PAGE_SHIFT, %g5
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sllx %g5, PAGE_SHIFT, %g5 ! Clear context ID bits
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bgu,pn %xcc, winfix_trampoline ! Yes, perform winfixup
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mov FAULT_CODE_DTLB | FAULT_CODE_WRITE, %g4
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ba,pt %xcc, sparc64_realfault_common ! Nope, normal fault
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nop
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nop
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/* PROT ** ICACHE line 3: Unused... */
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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/* PROT ** ICACHE line 4: Unused... */
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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