threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
93 lines
2.2 KiB
C
93 lines
2.2 KiB
C
/*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Copyright (C) 2012 Thomas Langer <thomas.langer@lantiq.com>
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* Copyright (C) 2012 John Crispin <john@phrozen.org>
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*/
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#include <linux/kernel.h>
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#include <asm/cacheflush.h>
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#include <asm/traps.h>
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#include <asm/io.h>
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#include <lantiq_soc.h>
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#include "../prom.h"
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#define SOC_FALCON "Falcon"
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#define SOC_FALCON_D "Falcon-D"
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#define SOC_FALCON_V "Falcon-V"
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#define SOC_FALCON_M "Falcon-M"
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#define COMP_FALCON "lantiq,falcon"
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#define PART_SHIFT 12
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#define PART_MASK 0x0FFFF000
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#define REV_SHIFT 28
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#define REV_MASK 0xF0000000
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#define SREV_SHIFT 22
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#define SREV_MASK 0x03C00000
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#define TYPE_SHIFT 26
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#define TYPE_MASK 0x3C000000
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/* reset, nmi and ejtag exception vectors */
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#define BOOT_REG_BASE (KSEG1 | 0x1F200000)
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#define BOOT_RVEC (BOOT_REG_BASE | 0x00)
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#define BOOT_NVEC (BOOT_REG_BASE | 0x04)
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#define BOOT_EVEC (BOOT_REG_BASE | 0x08)
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void __init ltq_soc_nmi_setup(void)
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{
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extern void (*nmi_handler)(void);
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ltq_w32((unsigned long)&nmi_handler, (void *)BOOT_NVEC);
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}
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void __init ltq_soc_ejtag_setup(void)
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{
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extern void (*ejtag_debug_handler)(void);
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ltq_w32((unsigned long)&ejtag_debug_handler, (void *)BOOT_EVEC);
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}
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void __init ltq_soc_detect(struct ltq_soc_info *i)
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{
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u32 type;
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i->partnum = (ltq_r32(FALCON_CHIPID) & PART_MASK) >> PART_SHIFT;
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i->rev = (ltq_r32(FALCON_CHIPID) & REV_MASK) >> REV_SHIFT;
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i->srev = ((ltq_r32(FALCON_CHIPCONF) & SREV_MASK) >> SREV_SHIFT);
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i->compatible = COMP_FALCON;
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i->type = SOC_TYPE_FALCON;
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sprintf(i->rev_type, "%c%d%d", (i->srev & 0x4) ? ('B') : ('A'),
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i->rev & 0x7, (i->srev & 0x3) + 1);
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switch (i->partnum) {
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case SOC_ID_FALCON:
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type = (ltq_r32(FALCON_CHIPTYPE) & TYPE_MASK) >> TYPE_SHIFT;
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switch (type) {
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case 0:
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i->name = SOC_FALCON_D;
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break;
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case 1:
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i->name = SOC_FALCON_V;
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break;
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case 2:
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i->name = SOC_FALCON_M;
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break;
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default:
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i->name = SOC_FALCON;
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break;
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}
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break;
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default:
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unreachable();
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break;
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}
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board_nmi_handler_setup = ltq_soc_nmi_setup;
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board_ejtag_handler_setup = ltq_soc_ejtag_setup;
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}
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