threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
66 lines
1.5 KiB
C
66 lines
1.5 KiB
C
/*
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* Copyright (C) 2016 Imagination Technologies
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* Author: Paul Burton <paul.burton@mips.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/clk.h>
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#include <linux/clk-provider.h>
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#include <linux/clocksource.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <asm/irq.h>
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#include <asm/mips-cps.h>
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#include <asm/time.h>
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int get_c0_fdc_int(void)
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{
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int mips_cpu_fdc_irq;
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if (mips_gic_present())
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mips_cpu_fdc_irq = gic_get_c0_fdc_int();
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else if (cpu_has_veic)
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panic("Unimplemented!");
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else if (cp0_fdc_irq >= 0)
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mips_cpu_fdc_irq = MIPS_CPU_IRQ_BASE + cp0_fdc_irq;
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else
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mips_cpu_fdc_irq = -1;
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return mips_cpu_fdc_irq;
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}
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int get_c0_perfcount_int(void)
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{
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int mips_cpu_perf_irq;
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if (mips_gic_present())
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mips_cpu_perf_irq = gic_get_c0_perfcount_int();
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else if (cpu_has_veic)
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panic("Unimplemented!");
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else if (cp0_perfcount_irq >= 0)
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mips_cpu_perf_irq = MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
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else
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mips_cpu_perf_irq = -1;
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return mips_cpu_perf_irq;
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}
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unsigned int get_c0_compare_int(void)
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{
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int mips_cpu_timer_irq;
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if (mips_gic_present())
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mips_cpu_timer_irq = gic_get_c0_compare_int();
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else if (cpu_has_veic)
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panic("Unimplemented!");
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else
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mips_cpu_timer_irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq;
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return mips_cpu_timer_irq;
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}
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