threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
98 lines
1.9 KiB
ArmAsm
98 lines
1.9 KiB
ArmAsm
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| sto_res.sa 3.1 12/10/90
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| Takes the result and puts it in where the user expects it.
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| Library functions return result in fp0. If fp0 is not the
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| users destination register then fp0 is moved to the
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| correct floating-point destination register. fp0 and fp1
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| are then restored to the original contents.
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| Input: result in fp0,fp1
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| d2 & a0 should be kept unmodified
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| Output: moves the result to the true destination reg or mem
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| Modifies: destination floating point register
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| Copyright (C) Motorola, Inc. 1990
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| All Rights Reserved
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| For details on the license for this file, please see the
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| file, README, in this same directory.
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STO_RES: |idnt 2,1 | Motorola 040 Floating Point Software Package
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|section 8
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#include "fpsp.h"
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.global sto_cos
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sto_cos:
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bfextu CMDREG1B(%a6){#13:#3},%d0 |extract cos destination
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cmpib #3,%d0 |check for fp0/fp1 cases
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bles c_fp0123
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fmovemx %fp1-%fp1,-(%a7)
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moveql #7,%d1
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subl %d0,%d1 |d1 = 7- (dest. reg. no.)
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clrl %d0
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bsetl %d1,%d0 |d0 is dynamic register mask
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fmovemx (%a7)+,%d0
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rts
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c_fp0123:
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cmpib #0,%d0
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beqs c_is_fp0
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cmpib #1,%d0
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beqs c_is_fp1
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cmpib #2,%d0
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beqs c_is_fp2
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c_is_fp3:
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fmovemx %fp1-%fp1,USER_FP3(%a6)
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rts
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c_is_fp2:
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fmovemx %fp1-%fp1,USER_FP2(%a6)
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rts
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c_is_fp1:
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fmovemx %fp1-%fp1,USER_FP1(%a6)
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rts
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c_is_fp0:
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fmovemx %fp1-%fp1,USER_FP0(%a6)
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rts
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.global sto_res
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sto_res:
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bfextu CMDREG1B(%a6){#6:#3},%d0 |extract destination register
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cmpib #3,%d0 |check for fp0/fp1 cases
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bles fp0123
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fmovemx %fp0-%fp0,-(%a7)
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moveql #7,%d1
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subl %d0,%d1 |d1 = 7- (dest. reg. no.)
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clrl %d0
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bsetl %d1,%d0 |d0 is dynamic register mask
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fmovemx (%a7)+,%d0
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rts
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fp0123:
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cmpib #0,%d0
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beqs is_fp0
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cmpib #1,%d0
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beqs is_fp1
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cmpib #2,%d0
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beqs is_fp2
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is_fp3:
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fmovemx %fp0-%fp0,USER_FP3(%a6)
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rts
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is_fp2:
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fmovemx %fp0-%fp0,USER_FP2(%a6)
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rts
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is_fp1:
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fmovemx %fp0-%fp0,USER_FP1(%a6)
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rts
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is_fp0:
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fmovemx %fp0-%fp0,USER_FP0(%a6)
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rts
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|end
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