threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
31 lines
1.2 KiB
Plaintext
31 lines
1.2 KiB
Plaintext
NVIDIA Tegra30 HDA controller
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Required properties:
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- compatible : For Tegra30, must contain "nvidia,tegra30-hda". Otherwise,
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must contain '"nvidia,<chip>-hda", "nvidia,tegra30-hda"', where <chip> is
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tegra114, tegra124, or tegra132.
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- reg : Should contain the HDA registers location and length.
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- interrupts : The interrupt from the HDA controller.
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- clocks : Must contain an entry for each required entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- clock-names : Must include the following entries: hda, hda2hdmi, hda2codec_2x
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- resets : Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names : Must include the following entries: hda, hda2hdmi, hda2codec_2x
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Example:
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hda@70030000 {
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compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda";
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reg = <0x0 0x70030000 0x0 0x10000>;
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interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA124_CLK_HDA>,
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<&tegra_car TEGRA124_CLK_HDA2HDMI>,
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<&tegra_car TEGRA124_CLK_HDA2CODEC_2X>;
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clock-names = "hda", "hda2hdmi", "hda2codec_2x";
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resets = <&tegra_car 125>, /* hda */
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<&tegra_car 128>, /* hda2hdmi */
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<&tegra_car 111>; /* hda2codec_2x */
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reset-names = "hda", "hda2hdmi", "hda2codec_2x";
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};
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