threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
73 lines
1.7 KiB
Plaintext
73 lines
1.7 KiB
Plaintext
Texas Instruments DRA72x CAMERA ADAPTATION LAYER (CAL)
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------------------------------------------------------
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The Camera Adaptation Layer (CAL) is a key component for image capture
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applications. The capture module provides the system interface and the
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processing capability to connect CSI2 image-sensor modules to the
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DRA72x device.
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Required properties:
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- compatible: must be "ti,dra72-cal"
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- reg: CAL Top level, Receiver Core #0, Receiver Core #1 and Camera RX
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control address space
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- reg-names: cal_top, cal_rx_core0, cal_rx_core1, and camerrx_control
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registers
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- interrupts: should contain IRQ line for the CAL;
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CAL supports 2 camera port nodes on MIPI bus. Each CSI2 camera port nodes
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should contain a 'port' child node with child 'endpoint' node. Please
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refer to the bindings defined in
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Documentation/devicetree/bindings/media/video-interfaces.txt.
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Example:
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cal: cal@4845b000 {
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compatible = "ti,dra72-cal";
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ti,hwmods = "cal";
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reg = <0x4845B000 0x400>,
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<0x4845B800 0x40>,
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<0x4845B900 0x40>,
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<0x4A002e94 0x4>;
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reg-names = "cal_top",
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"cal_rx_core0",
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"cal_rx_core1",
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"camerrx_control";
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interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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csi2_0: port@0 {
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reg = <0>;
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endpoint {
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slave-mode;
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remote-endpoint = <&ar0330_1>;
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};
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};
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csi2_1: port@1 {
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reg = <1>;
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};
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};
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};
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i2c5: i2c@4807c000 {
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ar0330@10 {
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compatible = "ti,ar0330";
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reg = <0x10>;
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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ar0330_1: endpoint {
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reg = <0>;
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clock-lanes = <1>;
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data-lanes = <0 2 3 4>;
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remote-endpoint = <&csi2_0>;
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};
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};
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};
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};
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