threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
124 lines
3.5 KiB
JSON
124 lines
3.5 KiB
JSON
[
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{
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"EventCode": "0x8",
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"Counter": "0,1",
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"UMask": "0x7",
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"EventName": "DATA_TLB_MISSES.DTLB_MISS",
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"SampleAfterValue": "200000",
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"BriefDescription": "Memory accesses that missed the DTLB."
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},
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{
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"EventCode": "0x8",
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"Counter": "0,1",
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"UMask": "0x5",
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"EventName": "DATA_TLB_MISSES.DTLB_MISS_LD",
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"SampleAfterValue": "200000",
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"BriefDescription": "DTLB misses due to load operations."
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},
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{
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"EventCode": "0x8",
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"Counter": "0,1",
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"UMask": "0x9",
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"EventName": "DATA_TLB_MISSES.L0_DTLB_MISS_LD",
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"SampleAfterValue": "200000",
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"BriefDescription": "L0 DTLB misses due to load operations."
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},
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{
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"EventCode": "0x8",
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"Counter": "0,1",
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"UMask": "0x6",
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"EventName": "DATA_TLB_MISSES.DTLB_MISS_ST",
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"SampleAfterValue": "200000",
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"BriefDescription": "DTLB misses due to store operations."
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},
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{
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"EventCode": "0x8",
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"Counter": "0,1",
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"UMask": "0xa",
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"EventName": "DATA_TLB_MISSES.L0_DTLB_MISS_ST",
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"SampleAfterValue": "200000",
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"BriefDescription": "L0 DTLB misses due to store operations"
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},
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{
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"EventCode": "0xC",
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"Counter": "0,1",
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"UMask": "0x3",
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"EventName": "PAGE_WALKS.WALKS",
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"SampleAfterValue": "200000",
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"BriefDescription": "Number of page-walks executed."
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},
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{
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"EventCode": "0xC",
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"Counter": "0,1",
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"UMask": "0x3",
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"EventName": "PAGE_WALKS.CYCLES",
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"SampleAfterValue": "2000000",
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"BriefDescription": "Duration of page-walks in core cycles"
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},
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{
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"EventCode": "0xC",
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"Counter": "0,1",
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"UMask": "0x1",
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"EventName": "PAGE_WALKS.D_SIDE_WALKS",
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"SampleAfterValue": "200000",
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"BriefDescription": "Number of D-side only page walks"
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},
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{
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"EventCode": "0xC",
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"Counter": "0,1",
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"UMask": "0x1",
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"EventName": "PAGE_WALKS.D_SIDE_CYCLES",
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"SampleAfterValue": "2000000",
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"BriefDescription": "Duration of D-side only page walks"
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},
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{
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"EventCode": "0xC",
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"Counter": "0,1",
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"UMask": "0x2",
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"EventName": "PAGE_WALKS.I_SIDE_WALKS",
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"SampleAfterValue": "200000",
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"BriefDescription": "Number of I-Side page walks"
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},
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{
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"EventCode": "0xC",
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"Counter": "0,1",
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"UMask": "0x2",
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"EventName": "PAGE_WALKS.I_SIDE_CYCLES",
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"SampleAfterValue": "2000000",
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"BriefDescription": "Duration of I-Side page walks"
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},
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{
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"EventCode": "0x82",
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"Counter": "0,1",
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"UMask": "0x1",
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"EventName": "ITLB.HIT",
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"SampleAfterValue": "200000",
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"BriefDescription": "ITLB hits."
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},
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{
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"EventCode": "0x82",
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"Counter": "0,1",
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"UMask": "0x4",
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"EventName": "ITLB.FLUSH",
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"SampleAfterValue": "200000",
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"BriefDescription": "ITLB flushes."
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},
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{
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"PEBS": "2",
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"EventCode": "0x82",
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"Counter": "0,1",
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"UMask": "0x2",
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"EventName": "ITLB.MISSES",
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"SampleAfterValue": "200000",
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"BriefDescription": "ITLB misses."
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},
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{
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"PEBS": "1",
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"EventCode": "0xCB",
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"Counter": "0,1",
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"UMask": "0x4",
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"EventName": "MEM_LOAD_RETIRED.DTLB_MISS",
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"SampleAfterValue": "200000",
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"BriefDescription": "Retired loads that miss the DTLB (precise event)."
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}
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] |