threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
133 lines
4.1 KiB
C
133 lines
4.1 KiB
C
/*
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* Copyright (C) 2015 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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/***************************************************************************
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*
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* Filename:
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* ---------
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* AudDrv_Clk.h
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*
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* Project:
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* --------
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* MT6797 Audio Driver clock control
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*
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* Description:
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* ------------
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* Audio clcok control
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*
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* Author:
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* -------
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* Chipeng Chang (mtk02308)
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*
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*---------------------------------------------------------------------------
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*
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****************************************************************************
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*/
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#ifndef _AUDDRV_CLK_H_
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#define _AUDDRV_CLK_H_
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/*****************************************************************************
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* C O M P I L E R F L A G S
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*****************************************************************************/
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/*****************************************************************************
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* E X T E R N A L R E F E R E N C E S
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*****************************************************************************/
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#include "mtk-auddrv-common.h"
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/*****************************************************************************
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* D A T A T Y P E S
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*****************************************************************************/
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/*****************************************************************************
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* M A C R O
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*****************************************************************************/
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/*****************************************************************************
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* FUNCTION D E F I N I T I O N
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*****************************************************************************/
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#include <linux/clk.h>
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extern int AudDrv_Clk_probe(void *dev);
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extern void AudDrv_Clk_Deinit(void *dev);
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void AudDrv_Clk_Global_Variable_Init(void);
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void AudDrv_AUDINTBUS_Sel(int parentidx);
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void AudDrv_Bus_Init(void);
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void AudDrv_Clk_On(void);
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void AudDrv_Clk_Off(void);
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void AudDrv_ANA_Clk_On(void);
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void AudDrv_ANA_Clk_Off(void);
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void AudDrv_I2S_Clk_On(void);
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void AudDrv_I2S_Clk_Off(void);
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void AudDrv_TDM_Clk_On(void);
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void AudDrv_TDM_Clk_Off(void);
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void AudDrv_ADC_Clk_On(void);
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void AudDrv_ADC_Clk_Off(void);
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void AudDrv_ADC2_Clk_On(void);
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void AudDrv_ADC2_Clk_Off(void);
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void AudDrv_ADC3_Clk_On(void);
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void AudDrv_ADC3_Clk_Off(void);
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void AudDrv_ADC_Hires_Clk_On(void);
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void AudDrv_ADC_Hires_Clk_Off(void);
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void AudDrv_ADC2_Hires_Clk_On(void);
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void AudDrv_ADC2_Hires_Clk_Off(void);
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void AudDrv_HDMI_Clk_On(void);
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void AudDrv_HDMI_Clk_Off(void);
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void AudDrv_APLL24M_Clk_On(void);
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void AudDrv_APLL24M_Clk_Off(void);
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void AudDrv_APLL22M_Clk_On(void);
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void AudDrv_APLL22M_Clk_Off(void);
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void AudDrv_APLL1Tuner_Clk_On(void);
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void AudDrv_APLL1Tuner_Clk_Off(void);
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void AudDrv_APLL2Tuner_Clk_On(void);
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void AudDrv_APLL2Tuner_Clk_Off(void);
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void AudDrv_Emi_Clk_On(void);
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void AudDrv_Emi_Clk_Off(void);
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void AudDrv_ANC_Clk_On(void);
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void AudDrv_ANC_Clk_Off(void);
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/* APLL , low jitter mode setting */
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unsigned int GetApllbySampleRate(unsigned int SampleRate);
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void EnableALLbySampleRate(unsigned int SampleRate);
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void DisableALLbySampleRate(unsigned int SampleRate);
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void EnableI2SDivPower(unsigned int Diveder_name, bool bEnable);
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void EnableApll1(bool bEnable);
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void EnableApll2(bool bEnable);
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void SetCLkBclk(unsigned int MckDiv, unsigned int SampleRate,
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unsigned int Channels, unsigned int Wlength);
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unsigned int SetCLkMclk(unsigned int I2snum, unsigned int SampleRate);
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void EnableI2SCLKDiv(unsigned int I2snum, bool bEnable);
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void PowerDownAllI2SDiv(void);
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void audio_clk_control(void);
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extern void aud_intbus_mux_sel(unsigned int aud_idx);
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#endif
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