threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
341 lines
7.9 KiB
C
341 lines
7.9 KiB
C
/*
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* Copyright (C) 2018, SI-IN, Yun Shi (yun.shi@si-in.com).
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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//#define DEBUG
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#define LOG_FLAG "sia81xx_regmap"
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#include <linux/regmap.h>
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#include <linux/device.h>
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#include "sia81xx_common.h"
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#include "sia81xx_regmap.h"
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#include "sia8101_regs.h"
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#include "sia8108_regs.h"
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#include "sia8109_regs.h"
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#include "sia8152_regs.h"
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#include "sia8152s_regs.h"
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#include "sia8159_regs.h"
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struct reg_map_info {
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const struct regmap_config *config;
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const struct sia81xx_reg_default_val *reg_default;
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const struct sia81xx_opt_if *opt;
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};
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static const struct reg_map_info reg_map_info_table[] = {
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[CHIP_TYPE_SIA8101] = {
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.config = &sia8101_regmap_config,
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.reg_default = &sia8101_reg_default_val,
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.opt = &sia8101_opt_if
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},
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[CHIP_TYPE_SIA8108] = {
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.config = &sia8108_regmap_config,
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.reg_default = &sia8108_reg_default_val,
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.opt = &sia8108_opt_if
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},
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[CHIP_TYPE_SIA8109] = {
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.config = &sia8109_regmap_config,
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.reg_default = &sia8109_reg_default_val,
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.opt = &sia8109_opt_if
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},
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[CHIP_TYPE_SIA8152] = {
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.config = &sia8152_regmap_config,
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.reg_default = &sia8152_reg_default_val,
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.opt = &sia8152_opt_if
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},
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[CHIP_TYPE_SIA8152S] = {
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.config = &sia8152s_regmap_config,
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.reg_default = &sia8152s_reg_default_val,
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.opt = &sia8152s_opt_if
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},
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[CHIP_TYPE_SIA8159] = {
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.config = &sia8159_regmap_config,
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.reg_default = &sia8159_reg_default_val,
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.opt = &sia8159_opt_if
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}
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};
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static int verify_chip_type(
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unsigned int type)
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{
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if (type >= ARRAY_SIZE(reg_map_info_table)) {
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//pr_warn("[ warn][%s] %s: chip_type = %u, "
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// "ARRAY_SIZE(reg_map_info) = %lu \r\n",
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// LOG_FLAG, __func__, type, ARRAY_SIZE(reg_map_info_table));
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return -ENODEV;
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}
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return 0;
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}
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int sia81xx_regmap_read(
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struct regmap *regmap,
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unsigned int start_reg,
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unsigned int reg_num,
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char *buf)
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{
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if(NULL == regmap) {
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pr_warn("[ warn][%s] %s: NULL == regmap \r\n",
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LOG_FLAG, __func__);
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return -EINVAL;
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}
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if(NULL == buf) {
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pr_err("[ err][%s] %s: NULL == buf \r\n",
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LOG_FLAG, __func__);
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return -EINVAL;
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}
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if(1 == reg_num) {
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unsigned int val = 0;
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int ret = regmap_read(regmap, start_reg, &val);
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if (0 == ret)
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*buf = (char)val;
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return ret;
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}
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return regmap_bulk_read(regmap, start_reg, buf, reg_num);
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}
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int sia81xx_regmap_write(
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struct regmap *regmap,
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unsigned int start_reg,
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unsigned int reg_num,
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const char *buf)
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{
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if(NULL == regmap) {
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pr_warn("[ warn][%s] %s: NULL == regmap \r\n",
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LOG_FLAG, __func__);
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return -EINVAL;
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}
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if(NULL == buf) {
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pr_err("[ err][%s] %s: NULL == buf \r\n",
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LOG_FLAG, __func__);
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return -EINVAL;
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}
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if(1 == reg_num) {
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unsigned int val = (unsigned int)(*buf);
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return regmap_write(regmap, start_reg, val);
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}
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return regmap_bulk_write(regmap, start_reg, buf, reg_num);
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}
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/*
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* Update regmap default register values based on machine id
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*/
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void sia81xx_regmap_defaults(
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struct regmap *regmap,
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unsigned int chip_type,
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unsigned int scene,
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unsigned int channel_num)
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{
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int ret = -ENOENT;
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int i = 0;
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pr_debug("[debug][%s] %s: running, chip_type = %u, channel_num = %u \r\n",
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LOG_FLAG, __func__, chip_type, channel_num);
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if(NULL == regmap) {
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pr_warn("[ warn][%s] %s: NULL == regmap \r\n",
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LOG_FLAG, __func__);
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return ;
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}
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if(AUDIO_SCENE_NUM <= scene) {
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pr_err("[ err][%s] %s: scene = %u, AUDIO_SCENE_NUM = %u \r\n",
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LOG_FLAG, __func__, scene, AUDIO_SCENE_NUM);
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return ;
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}
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if(SIA81XX_CHANNEL_NUM <= channel_num) {
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pr_err("[ err][%s] %s: channel_num = %u, SIA81XX_CHANNEL_NUM = %u \r\n",
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LOG_FLAG, __func__, channel_num, SIA81XX_CHANNEL_NUM);
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return ;
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}
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for (i = 0; i < ARRAY_SIZE(reg_map_info_table); i++) {
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if (NULL == reg_map_info_table[i].reg_default)
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continue;
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if (chip_type == reg_map_info_table[i].reg_default->chip_type) {
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ret = sia81xx_regmap_write(
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regmap,
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reg_map_info_table[i].reg_default->offset,
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reg_map_info_table[i].reg_default->reg_defaults[scene].num,
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reg_map_info_table[i].reg_default->reg_defaults[scene].vals +
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(channel_num * reg_map_info_table[i].reg_default->reg_defaults[scene].num)
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);
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break;
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}
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}
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if (0 != ret) {
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pr_warn("[ warn][%s] %s: ret = %d, chip_type = %u, regmap = %p \r\n",
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LOG_FLAG, __func__, ret, chip_type, regmap);
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}
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}
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struct regmap *sia81xx_regmap_init(
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struct i2c_client *client,
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unsigned int chip_type)
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{
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if(NULL == client)
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return NULL;
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if(0 != verify_chip_type(chip_type))
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return NULL;
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return devm_regmap_init_i2c(client, reg_map_info_table[chip_type].config);
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}
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void sia81xx_regmap_remove(
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struct regmap *regmap)
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{
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if(!IS_ERR(regmap))
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regmap_exit(regmap);
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}
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/********************************************************************
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* sia81xx reg map opt functions
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********************************************************************/
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int sia81xx_regmap_check_chip_id(
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struct regmap *regmap,
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unsigned int chip_type)
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{
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if(NULL == regmap)
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return -EPERM;
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if(0 != verify_chip_type(chip_type))
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return -EPERM;
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if(NULL != reg_map_info_table[chip_type].opt->check_chip_id) {
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return reg_map_info_table[chip_type].opt->check_chip_id(regmap);
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}
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/* if no need to check chip id then return "pass" */
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return 0;
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}
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void sia81xx_regmap_set_xfilter(
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struct regmap *regmap,
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unsigned int chip_type,
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unsigned int val)
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{
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if(NULL == regmap)
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return ;
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if(0 != verify_chip_type(chip_type))
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return ;
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if(NULL != reg_map_info_table[chip_type].opt->set_xfilter) {
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reg_map_info_table[chip_type].opt->set_xfilter(regmap, val);
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}
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return ;
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}
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void sia81xx_regmap_set_chip_on(
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struct regmap *regmap,
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unsigned int chip_type,
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unsigned int scene)
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{
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if(NULL == regmap)
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return ;
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if(0 != verify_chip_type(chip_type))
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return ;
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if(NULL != reg_map_info_table[chip_type].opt->chip_on) {
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reg_map_info_table[chip_type].opt->chip_on(regmap, scene);
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}
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}
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void sia81xx_regmap_set_chip_off(
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struct regmap *regmap,
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unsigned int chip_type)
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{
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if(NULL == regmap)
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return ;
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if(0 != verify_chip_type(chip_type))
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return ;
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if(NULL != reg_map_info_table[chip_type].opt->chip_off) {
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reg_map_info_table[chip_type].opt->chip_off(regmap);
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}
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}
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bool sia81xx_regmap_get_chip_en(
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struct regmap *regmap,
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unsigned int chip_type)
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{
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if(NULL == regmap)
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return false;
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if(0 != verify_chip_type(chip_type))
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return false;
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if(NULL != reg_map_info_table[chip_type].opt->get_chip_en) {
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return reg_map_info_table[chip_type].opt->get_chip_en(regmap);
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}
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return false;
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}
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void sia81xx_regmap_set_pvdd_limit(
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struct regmap *regmap,
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unsigned int chip_type,
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unsigned int vol)
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{
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if(NULL == regmap)
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return ;
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if(0 != verify_chip_type(chip_type))
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return ;
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if(NULL != reg_map_info_table[chip_type].opt->set_pvdd_limit) {
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reg_map_info_table[chip_type].opt->set_pvdd_limit(regmap, vol);
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}
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}
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void sia81xx_regmap_check_trimming(
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struct regmap *regmap,
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unsigned int chip_type)
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{
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if(NULL == regmap)
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return ;
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if(0 != verify_chip_type(chip_type))
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return ;
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if(NULL != reg_map_info_table[chip_type].opt->check_trimming) {
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reg_map_info_table[chip_type].opt->check_trimming(regmap);
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}
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}
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/********************************************************************
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* end - sia81xx reg map opt functions
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********************************************************************/
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