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bc1d038eac5003cdc9cab2c363a88dbbc9bebe92
android/sound/soc/codecs/sia81xx/sia8109_regs.c
T
threeeye bc1d038eac REVVL 6 Pro kernel bring-up: full working tree snapshot (2026-09-12) 
Squashed backup commit (no shallow-clone history issues) of
xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream
commit 9eece662e) plus all fixes applied to get everpal_defconfig building
clean against a modern (GCC 15.2.0) toolchain -- see the previous commit
message on the lineage-23.2 branch (also in this repo history is not
available here since this is a squashed snapshot; full incremental history
lives in the local DL380 checkout and the upstream GitHub remote).

Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
2026-09-12 13:36:46 +00:00

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/*
* Copyright (C) 2018, SI-IN, Yun Shi (yun.shi@si-in.com).
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 and
* only version 2 as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
//#define DEBUG
#define LOG_FLAG "sia8109_regs"
#include <linux/delay.h>
#include <linux/regmap.h>
#include <linux/device.h>
#include "sia81xx_common.h"
#include "sia81xx_regmap.h"
#include "sia8109_regs.h"
#define SIA8109_WRITEABLE_REG_NUM (14)
/*+Bug 651549, zhouweijie.wt, 20210607, wt qudate sia reg for factory version*/
#ifndef WT_COMPILE_FACTORY_VERSION
static const char sia8109_palyback_defaults[][SIA8109_WRITEABLE_REG_NUM] = {
[SIA81XX_CHANNEL_L] = {
0x07, //SIA8109_REG_SYSCTRL
0x80, //SIA8109_REG_AGCCTRL
0xCE, //SIA8109_REG_BOOST_CFG
0x19, //SIA8109_REG_CLSD_CFG1
0x26, //SIA8109_REG_CLSD_CFG2
0x0A, //SIA8109_REG_BSG_CFG
0x02, //SIA8109_REG_SML_CFG1
0x28, //SIA8109_REG_SML_CFG2
0x05, //SIA8109_REG_SML_CFG3
0x8A, //SIA8109_REG_SML_CFG4
0x00, //SIA8109_REG_Excur_CTRL_1
0x00, //SIA8109_REG_Excur_CTRL_2
0x00, //SIA8109_REG_Excur_CTRL_3
0x00 //SIA8109_REG_Excur_CTRL_4
},
[SIA81XX_CHANNEL_R] = {
0x07, //SIA8109_REG_SYSCTRL
0x80, //SIA8109_REG_AGCCTRL
0xCE, //SIA8109_REG_BOOST_CFG
0x19, //SIA8109_REG_CLSD_CFG1
0x26, //SIA8109_REG_CLSD_CFG2
0x0A, //SIA8109_REG_BSG_CFG
0x02, //SIA8109_REG_SML_CFG1
0x28, //SIA8109_REG_SML_CFG2
0x05, //SIA8109_REG_SML_CFG3
0x8A, //SIA8109_REG_SML_CFG4
0x00, //SIA8109_REG_Excur_CTRL_1
0x00, //SIA8109_REG_Excur_CTRL_2
0x00, //SIA8109_REG_Excur_CTRL_3
0x00 //SIA8109_REG_Excur_CTRL_4
}
};
#else
static const char sia8109_palyback_defaults[][SIA8109_WRITEABLE_REG_NUM] = {
[SIA81XX_CHANNEL_L] = {
0x07, //SIA8109_REG_SYSCTRL
0x1C, //SIA8109_REG_AGCCTRL
0xCE, //SIA8109_REG_BOOST_CFG
0x19, //SIA8109_REG_CLSD_CFG1
0x26, //SIA8109_REG_CLSD_CFG2
0x0A, //SIA8109_REG_BSG_CFG
0x02, //SIA8109_REG_SML_CFG1
0x48, //SIA8109_REG_SML_CFG2
0x08, //SIA8109_REG_SML_CFG3
0x88, //SIA8109_REG_SML_CFG4
0x00, //SIA8109_REG_Excur_CTRL_1
0x00, //SIA8109_REG_Excur_CTRL_2
0x00, //SIA8109_REG_Excur_CTRL_3
0x00 //SIA8109_REG_Excur_CTRL_4
},
[SIA81XX_CHANNEL_R] = {
0x07, //SIA8109_REG_SYSCTRL
0x1C, //SIA8109_REG_AGCCTRL
0xCE, //SIA8109_REG_BOOST_CFG
0x19, //SIA8109_REG_CLSD_CFG1
0x26, //SIA8109_REG_CLSD_CFG2
0x0A, //SIA8109_REG_BSG_CFG
0x02, //SIA8109_REG_SML_CFG1
0x48, //SIA8109_REG_SML_CFG2
0x08, //SIA8109_REG_SML_CFG3
0x88, //SIA8109_REG_SML_CFG4
0x00, //SIA8109_REG_Excur_CTRL_1
0x00, //SIA8109_REG_Excur_CTRL_2
0x00, //SIA8109_REG_Excur_CTRL_3
0x00 //SIA8109_REG_Excur_CTRL_4
}
};
#endif
/*-Bug 651549, zhouweijie.wt, 20210607, wt qudate sia reg for factory version*/
#ifndef WT_COMPILE_FACTORY_VERSION
static const char sia8109_voice_defaults[][SIA8109_WRITEABLE_REG_NUM] = {
[SIA81XX_CHANNEL_L] = {
0x07, //SIA8109_REG_SYSCTRL
0x9C, //SIA8109_REG_AGCCTRL
0xCE, //SIA8109_REG_BOOST_CFG
0x1A, //SIA8109_REG_CLSD_CFG1
0x26, //SIA8109_REG_CLSD_CFG2
0x0A, //SIA8109_REG_BSG_CFG
0x02, //SIA8109_REG_SML_CFG1
0x48, //SIA8109_REG_SML_CFG2
0x08, //SIA8109_REG_SML_CFG3
0x88, //SIA8109_REG_SML_CFG4
0x00, //SIA8109_REG_Excur_CTRL_1
0x00, //SIA8109_REG_Excur_CTRL_2
0x00, //SIA8109_REG_Excur_CTRL_3
0x00 //SIA8109_REG_Excur_CTRL_4
},
[SIA81XX_CHANNEL_R] = {
0x07, //SIA8109_REG_SYSCTRL
0x9C, //SIA8109_REG_AGCCTRL
0xCE, //SIA8109_REG_BOOST_CFG
0x1A, //SIA8109_REG_CLSD_CFG1
0x26, //SIA8109_REG_CLSD_CFG2
0x0A, //SIA8109_REG_BSG_CFG
0x02, //SIA8109_REG_SML_CFG1
0x48, //SIA8109_REG_SML_CFG2
0x08, //SIA8109_REG_SML_CFG3
0x88, //SIA8109_REG_SML_CFG4
0x00, //SIA8109_REG_Excur_CTRL_1
0x00, //SIA8109_REG_Excur_CTRL_2
0x00, //SIA8109_REG_Excur_CTRL_3
0x00 //SIA8109_REG_Excur_CTRL_4
}
};
#else
static const char sia8109_voice_defaults[][SIA8109_WRITEABLE_REG_NUM] = {
[SIA81XX_CHANNEL_L] = {
0x07, //SIA8109_REG_SYSCTRL
0x1C, //SIA8109_REG_AGCCTRL
0xCE, //SIA8109_REG_BOOST_CFG
0x19, //SIA8109_REG_CLSD_CFG1
0x26, //SIA8109_REG_CLSD_CFG2
0x0A, //SIA8109_REG_BSG_CFG
0x02, //SIA8109_REG_SML_CFG1
0x48, //SIA8109_REG_SML_CFG2
0x08, //SIA8109_REG_SML_CFG3
0x88, //SIA8109_REG_SML_CFG4
0x00, //SIA8109_REG_Excur_CTRL_1
0x00, //SIA8109_REG_Excur_CTRL_2
0x00, //SIA8109_REG_Excur_CTRL_3
0x00 //SIA8109_REG_Excur_CTRL_4
},
[SIA81XX_CHANNEL_R] = {
0x07, //SIA8109_REG_SYSCTRL
0x1C, //SIA8109_REG_AGCCTRL
0xCE, //SIA8109_REG_BOOST_CFG
0x19, //SIA8109_REG_CLSD_CFG1
0x26, //SIA8109_REG_CLSD_CFG2
0x0A, //SIA8109_REG_BSG_CFG
0x02, //SIA8109_REG_SML_CFG1
0x48, //SIA8109_REG_SML_CFG2
0x08, //SIA8109_REG_SML_CFG3
0x88, //SIA8109_REG_SML_CFG4
0x00, //SIA8109_REG_Excur_CTRL_1
0x00, //SIA8109_REG_Excur_CTRL_2
0x00, //SIA8109_REG_Excur_CTRL_3
0x00 //SIA8109_REG_Excur_CTRL_4
}
};
#endif
/*+Bug 651549, zhouweijie.wt, 20210607, wt qudate sia reg for factory version*/
#ifndef WT_COMPILE_FACTORY_VERSION
static const char sia8109_receiver_defaults[][SIA8109_WRITEABLE_REG_NUM] = {
[SIA81XX_CHANNEL_L] = {
0x06, //SIA8109_REG_SYSCTRL
0x80, //SIA8109_REG_AGCCTRL
0xCC, //SIA8109_REG_BOOST_CFG
0x09, //SIA8109_REG_CLSD_CFG1
0x26, //SIA8109_REG_CLSD_CFG2
0x0A, //SIA8109_REG_BSG_CFG
0x02, //SIA8109_REG_SML_CFG1
0x28, //SIA8109_REG_SML_CFG2
0x03, //SIA8109_REG_SML_CFG3
0x50, //SIA8109_REG_SML_CFG4
0x00, //SIA8109_REG_Excur_CTRL_1
0x00, //SIA8109_REG_Excur_CTRL_2
0x00, //SIA8109_REG_Excur_CTRL_3
0x00 //SIA8109_REG_Excur_CTRL_4
},
[SIA81XX_CHANNEL_R] = {
0x06, //SIA8109_REG_SYSCTRL
0x80, //SIA8109_REG_AGCCTRL
0xCC, //SIA8109_REG_BOOST_CFG
0x09, //SIA8109_REG_CLSD_CFG1
0x26, //SIA8109_REG_CLSD_CFG2
0x0A, //SIA8109_REG_BSG_CFG
0x02, //SIA8109_REG_SML_CFG1
0x28, //SIA8109_REG_SML_CFG2
0x03, //SIA8109_REG_SML_CFG3
0x50, //SIA8109_REG_SML_CFG4
0x00, //SIA8109_REG_Excur_CTRL_1
0x00, //SIA8109_REG_Excur_CTRL_2
0x00, //SIA8109_REG_Excur_CTRL_3
0x00 //SIA8109_REG_Excur_CTRL_4
}
};
#else
static const char sia8109_receiver_defaults[][SIA8109_WRITEABLE_REG_NUM] = {
[SIA81XX_CHANNEL_L] = {
0x06, //SIA8109_REG_SYSCTRL
0x80, //SIA8109_REG_AGCCTRL
0xCC, //SIA8109_REG_BOOST_CFG
0x09, //SIA8109_REG_CLSD_CFG1
0x26, //SIA8109_REG_CLSD_CFG2
0x0A, //SIA8109_REG_BSG_CFG
0x02, //SIA8109_REG_SML_CFG1
0x28, //SIA8109_REG_SML_CFG2
0x03, //SIA8109_REG_SML_CFG3
0x50, //SIA8109_REG_SML_CFG4
0x00, //SIA8109_REG_Excur_CTRL_1
0x00, //SIA8109_REG_Excur_CTRL_2
0x00, //SIA8109_REG_Excur_CTRL_3
0x00 //SIA8109_REG_Excur_CTRL_4
},
[SIA81XX_CHANNEL_R] = {
0x06, //SIA8109_REG_SYSCTRL
0x80, //SIA8109_REG_AGCCTRL
0xCC, //SIA8109_REG_BOOST_CFG
0x09, //SIA8109_REG_CLSD_CFG1
0x26, //SIA8109_REG_CLSD_CFG2
0x0A, //SIA8109_REG_BSG_CFG
0x02, //SIA8109_REG_SML_CFG1
0x28, //SIA8109_REG_SML_CFG2
0x03, //SIA8109_REG_SML_CFG3
0x50, //SIA8109_REG_SML_CFG4
0x00, //SIA8109_REG_Excur_CTRL_1
0x00, //SIA8109_REG_Excur_CTRL_2
0x00, //SIA8109_REG_Excur_CTRL_3
0x00 //SIA8109_REG_Excur_CTRL_4
}
};
#endif
/*-Bug 651549, zhouweijie.wt, 20210607, wt qudate sia reg for factory version*/
static const char sia8109_factory_defaults[][SIA8109_WRITEABLE_REG_NUM] = {
[SIA81XX_CHANNEL_L] = {
0x07, //SIA8109_REG_SYSCTRL
0x1C, //SIA8109_REG_AGCCTRL
0xCE, //SIA8109_REG_BOOST_CFG
0x19, //SIA8109_REG_CLSD_CFG1
0x26, //SIA8109_REG_CLSD_CFG2
0x0A, //SIA8109_REG_BSG_CFG
0x02, //SIA8109_REG_SML_CFG1
0x48, //SIA8109_REG_SML_CFG2
0x08, //SIA8109_REG_SML_CFG3
0x88, //SIA8109_REG_SML_CFG4
0x00, //SIA8109_REG_Excur_CTRL_1
0x00, //SIA8109_REG_Excur_CTRL_2
0x00, //SIA8109_REG_Excur_CTRL_3
0x00 //SIA8109_REG_Excur_CTRL_4
},
[SIA81XX_CHANNEL_R] = {
0x07, //SIA8109_REG_SYSCTRL
0x1C, //SIA8109_REG_AGCCTRL
0xCE, //SIA8109_REG_BOOST_CFG
0x19, //SIA8109_REG_CLSD_CFG1
0x26, //SIA8109_REG_CLSD_CFG2
0x0A, //SIA8109_REG_BSG_CFG
0x02, //SIA8109_REG_SML_CFG1
0x48, //SIA8109_REG_SML_CFG2
0x08, //SIA8109_REG_SML_CFG3
0x88, //SIA8109_REG_SML_CFG4
0x00, //SIA8109_REG_Excur_CTRL_1
0x00, //SIA8109_REG_Excur_CTRL_2
0x00, //SIA8109_REG_Excur_CTRL_3
0x00 //SIA8109_REG_Excur_CTRL_4
}
};
const struct sia81xx_reg_default_val sia8109_reg_default_val = {
.chip_type = CHIP_TYPE_SIA8109,
.offset = SIA8109_REG_SYSCTRL,
.reg_defaults[AUDIO_SCENE_PLAYBACK] = {
.vals = (char *)sia8109_palyback_defaults,
.num = ARRAY_SIZE(sia8109_palyback_defaults[0])
},
.reg_defaults[AUDIO_SCENE_VOICE] = {
.vals = (char *)sia8109_voice_defaults,
.num = ARRAY_SIZE(sia8109_voice_defaults[0])
},
.reg_defaults[AUDIO_SCENE_RECEIVER] = {
.vals = (char *)sia8109_receiver_defaults,
.num = ARRAY_SIZE(sia8109_receiver_defaults[0])
},
.reg_defaults[AUDIO_SCENE_FACTORY] = {
.vals = (char *)sia8109_factory_defaults,
.num = ARRAY_SIZE(sia8109_factory_defaults[0])
}
};
static bool sia8109_writeable_register(
struct device *dev,
unsigned int reg)
{
switch (reg) {
case SIA8109_REG_SYSCTRL ... 0x22 :
return true;
default :
break;
}
return false;
}
static bool sia8109_readable_register(
struct device *dev,
unsigned int reg)
{
switch (reg) {
case SIA8109_REG_SYSCTRL ... 0x22 :
case SIA8109_REG_CHIP_ID :
return true;
default :
break;
}
return false;
}
static bool sia8109_volatile_register(
struct device *dev,
unsigned int reg)
{
return true;
}
const struct regmap_config sia8109_regmap_config = {
.name = "sia8109",
.reg_bits = 8,
.val_bits = 8,
.reg_stride = 0,
.pad_bits = 0,
.cache_type = REGCACHE_NONE,
.reg_defaults = NULL,
.num_reg_defaults = 0,
.writeable_reg = sia8109_writeable_register,
.readable_reg = sia8109_readable_register,
.volatile_reg = sia8109_volatile_register,
.reg_format_endian = REGMAP_ENDIAN_NATIVE,
.val_format_endian = REGMAP_ENDIAN_NATIVE,
};
static int sia8109_check_chip_id(
struct regmap *regmap)
{
char val = 0;
if(0 != sia81xx_regmap_read(regmap, SIA8109_REG_CHIP_ID, 1, &val))
return -1;
if(SIA8109_CHIP_ID_V0_1 != val &&
SIA8109_CHIP_ID_V1 != val)
return -1;
return 0;
}
static void sia8109_set_xfilter(
struct regmap *regmap,
unsigned int val)
{
const char buf = 0x10;
if(1 == val) {
sia81xx_regmap_write(regmap, SIA8109_REG_Excur_CTRL_2, 1, &buf);
}
pr_debug("[debug][%s] %s: val = %u \r\n", LOG_FLAG, __func__, val);
}
static void sia8109_chip_on(
struct regmap *regmap, unsigned int scene)
{
#if 0
char val = 0x80;
mdelay(45); // use agc to rise gain
#ifdef USE_ON_CHIP_AGC
if (AUDIO_SCENE_VOICE == scene)
val = 0x9C;
else
val = 0x80;
#endif
// disable agc
if (0 != sia81xx_regmap_write(regmap, SIA8109_REG_AGCCTRL, 1, &val)) {
pr_err("[ err][%s] %s: write reg err !!! \r\n",
LOG_FLAG, __func__);
}
#endif
}
static void sia8109_chip_off(
struct regmap *regmap)
{
const char val = 0x06;
// set rcv mode to reduce pop noise
if (0 != sia81xx_regmap_write(regmap, SIA8109_REG_SYSCTRL, 1, &val)) {
pr_err("[ err][%s] %s: write reg err !!! \r\n",
LOG_FLAG, __func__);
}
udelay(10);
}
const struct sia81xx_opt_if sia8109_opt_if = {
.check_chip_id = sia8109_check_chip_id,
.set_xfilter = sia8109_set_xfilter,
.chip_on = sia8109_chip_on,
.chip_off = sia8109_chip_off,
.get_chip_en = NULL,
.set_pvdd_limit = NULL,
.check_trimming = NULL,
};
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