threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
84 lines
2.2 KiB
C
84 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* PC-Speaker driver for Linux
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*
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* Copyright (C) 1993-1997 Michael Beck
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* Copyright (C) 1997-2001 David Woodhouse
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* Copyright (C) 2001-2008 Stas Sergeev
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*/
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#ifndef __PCSP_H__
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#define __PCSP_H__
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#include <linux/hrtimer.h>
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#include <linux/i8253.h>
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#include <linux/timex.h>
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#define PCSP_SOUND_VERSION 0x400 /* read 4.00 */
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#define PCSP_DEBUG 0
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/* default timer freq for PC-Speaker: 18643 Hz */
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#define DIV_18KHZ 64
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#define MAX_DIV DIV_18KHZ
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#define CALC_DIV(d) (MAX_DIV >> (d))
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#define CUR_DIV() CALC_DIV(chip->treble)
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#define PCSP_MAX_TREBLE 1
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/* unfortunately, with hrtimers 37KHz does not work very well :( */
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#define PCSP_DEFAULT_TREBLE 0
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#define MIN_DIV (MAX_DIV >> PCSP_MAX_TREBLE)
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/* wild guess */
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#define PCSP_MIN_LPJ 1000000
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#define PCSP_DEFAULT_SDIV (DIV_18KHZ >> 1)
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#define PCSP_DEFAULT_SRATE (PIT_TICK_RATE / PCSP_DEFAULT_SDIV)
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#define PCSP_INDEX_INC() (1 << (PCSP_MAX_TREBLE - chip->treble))
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#define PCSP_CALC_RATE(i) (PIT_TICK_RATE / CALC_DIV(i))
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#define PCSP_RATE() PCSP_CALC_RATE(chip->treble)
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#define PCSP_MIN_RATE__1 MAX_DIV/PIT_TICK_RATE
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#define PCSP_MAX_RATE__1 MIN_DIV/PIT_TICK_RATE
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#define PCSP_MAX_PERIOD_NS (1000000000ULL * PCSP_MIN_RATE__1)
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#define PCSP_MIN_PERIOD_NS (1000000000ULL * PCSP_MAX_RATE__1)
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#define PCSP_CALC_NS(div) ({ \
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u64 __val = 1000000000ULL * (div); \
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do_div(__val, PIT_TICK_RATE); \
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__val; \
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})
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#define PCSP_PERIOD_NS() PCSP_CALC_NS(CUR_DIV())
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#define PCSP_MAX_PERIOD_SIZE (64*1024)
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#define PCSP_MAX_PERIODS 512
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#define PCSP_BUFFER_SIZE (128*1024)
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struct snd_pcsp {
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struct snd_card *card;
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struct snd_pcm *pcm;
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struct input_dev *input_dev;
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struct hrtimer timer;
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unsigned short port, irq, dma;
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spinlock_t substream_lock;
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struct snd_pcm_substream *playback_substream;
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unsigned int fmt_size;
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unsigned int is_signed;
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size_t playback_ptr;
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size_t period_ptr;
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atomic_t timer_active;
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int thalf;
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u64 ns_rem;
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unsigned char val61;
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int enable;
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int max_treble;
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int treble;
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int pcspkr;
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};
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extern struct snd_pcsp pcsp_chip;
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extern enum hrtimer_restart pcsp_do_timer(struct hrtimer *handle);
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extern void pcsp_sync_stop(struct snd_pcsp *chip);
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extern int snd_pcsp_new_pcm(struct snd_pcsp *chip);
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extern int snd_pcsp_new_mixer(struct snd_pcsp *chip, int nopcm);
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#endif
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