threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
109 lines
2.7 KiB
C
109 lines
2.7 KiB
C
/*
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* Copyright (C) 2010 Google, Inc.
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* Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
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*
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* Author:
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* Colin Cross <ccross@android.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __DRIVERS_MISC_TEGRA_FUSE_H
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#define __DRIVERS_MISC_TEGRA_FUSE_H
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#include <linux/dmaengine.h>
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#include <linux/types.h>
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struct tegra_fuse;
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struct tegra_fuse_info {
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u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
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unsigned int size;
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unsigned int spare;
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};
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struct tegra_fuse_soc {
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void (*init)(struct tegra_fuse *fuse);
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void (*speedo_init)(struct tegra_sku_info *info);
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int (*probe)(struct tegra_fuse *fuse);
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const struct tegra_fuse_info *info;
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};
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struct tegra_fuse {
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struct device *dev;
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void __iomem *base;
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phys_addr_t phys;
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struct clk *clk;
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u32 (*read_early)(struct tegra_fuse *fuse, unsigned int offset);
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u32 (*read)(struct tegra_fuse *fuse, unsigned int offset);
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const struct tegra_fuse_soc *soc;
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/* APBDMA on Tegra20 */
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struct {
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struct mutex lock;
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struct completion wait;
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struct dma_chan *chan;
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struct dma_slave_config config;
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dma_addr_t phys;
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u32 *virt;
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} apbdma;
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};
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void tegra_init_revision(void);
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void tegra_init_apbmisc(void);
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u32 __init tegra_fuse_read_spare(unsigned int spare);
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u32 __init tegra_fuse_read_early(unsigned int offset);
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#ifdef CONFIG_ARCH_TEGRA_2x_SOC
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void tegra20_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#ifdef CONFIG_ARCH_TEGRA_3x_SOC
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void tegra30_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#ifdef CONFIG_ARCH_TEGRA_114_SOC
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void tegra114_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
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void tegra124_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#ifdef CONFIG_ARCH_TEGRA_210_SOC
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void tegra210_init_speedo_data(struct tegra_sku_info *sku_info);
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#endif
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#ifdef CONFIG_ARCH_TEGRA_2x_SOC
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extern const struct tegra_fuse_soc tegra20_fuse_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_3x_SOC
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extern const struct tegra_fuse_soc tegra30_fuse_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_114_SOC
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extern const struct tegra_fuse_soc tegra114_fuse_soc;
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#endif
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#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
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extern const struct tegra_fuse_soc tegra124_fuse_soc;
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#endif
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#ifdef CONFIG_ARCH_TEGRA_210_SOC
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extern const struct tegra_fuse_soc tegra210_fuse_soc;
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#endif
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#endif
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