threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
57 lines
1.7 KiB
C
57 lines
1.7 KiB
C
/*
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* QE USB routines
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*
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* Copyright 2006 Freescale Semiconductor, Inc.
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* Shlomi Gridish <gridish@freescale.com>
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* Jerry Huang <Chang-Ming.Huang@freescale.com>
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* Copyright (c) MontaVista Software, Inc. 2008.
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* Anton Vorontsov <avorontsov@ru.mvista.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/export.h>
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#include <linux/io.h>
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#include <soc/fsl/qe/immap_qe.h>
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#include <soc/fsl/qe/qe.h>
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int qe_usb_clock_set(enum qe_clock clk, int rate)
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{
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struct qe_mux __iomem *mux = &qe_immr->qmx;
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unsigned long flags;
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u32 val;
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switch (clk) {
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case QE_CLK3: val = QE_CMXGCR_USBCS_CLK3; break;
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case QE_CLK5: val = QE_CMXGCR_USBCS_CLK5; break;
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case QE_CLK7: val = QE_CMXGCR_USBCS_CLK7; break;
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case QE_CLK9: val = QE_CMXGCR_USBCS_CLK9; break;
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case QE_CLK13: val = QE_CMXGCR_USBCS_CLK13; break;
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case QE_CLK17: val = QE_CMXGCR_USBCS_CLK17; break;
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case QE_CLK19: val = QE_CMXGCR_USBCS_CLK19; break;
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case QE_CLK21: val = QE_CMXGCR_USBCS_CLK21; break;
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case QE_BRG9: val = QE_CMXGCR_USBCS_BRG9; break;
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case QE_BRG10: val = QE_CMXGCR_USBCS_BRG10; break;
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default:
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pr_err("%s: requested unknown clock %d\n", __func__, clk);
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return -EINVAL;
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}
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if (qe_clock_is_brg(clk))
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qe_setbrg(clk, rate, 1);
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spin_lock_irqsave(&cmxgcr_lock, flags);
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clrsetbits_be32(&mux->cmxgcr, QE_CMXGCR_USBCS, val);
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spin_unlock_irqrestore(&cmxgcr_lock, flags);
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return 0;
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}
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EXPORT_SYMBOL(qe_usb_clock_set);
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