Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
1021 lines
26 KiB
C
1021 lines
26 KiB
C
/*
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* Copyright (c) 2014-2015 MediaTek Inc.
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* Author: Tianping.Fang <tianping.fang@mediatek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/regmap.h>
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#include <linux/rtc.h>
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#include <linux/irqdomain.h>
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#include <linux/platform_device.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/io.h>
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#include <linux/mfd/mt6397/core.h>
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#include <linux/reboot.h>
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#ifdef CONFIG_MTK_KERNEL_POWER_OFF_CHARGING
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#include "../misc/mediatek/include/mt-plat/mtk_boot_common.h"
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#endif
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#define RTC_BBPU 0x0000
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#define RTC_BBPU_CBUSY BIT(6)
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#define RTC_WRTGR 0x003c
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#define RTC_IRQ_STA 0x0002
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#define RTC_IRQ_STA_AL BIT(0)
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#define RTC_IRQ_STA_LP BIT(3)
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#define RTC_IRQ_EN 0x0004
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#define RTC_IRQ_EN_AL BIT(0)
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#define RTC_IRQ_EN_ONESHOT BIT(2)
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#define RTC_IRQ_EN_LP BIT(3)
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#define RTC_IRQ_EN_ONESHOT_AL (RTC_IRQ_EN_ONESHOT | RTC_IRQ_EN_AL)
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#define RTC_AL_YEA_MASK 0x007f
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#define RTC_AL_MTH_MASK 0x000f
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#define RTC_AL_DOM_MASK 0x001f
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#define RTC_AL_HOU_MASK 0x001f
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#define RTC_AL_MIN_MASK 0x003f
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#define RTC_AL_SEC_MASK 0x003f
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#define RTC_AL_MASK 0x0008
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#define RTC_AL_MASK_DOW BIT(4)
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#define RTC_TC_SEC 0x000a
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#define RTC_SPAR1 0x0032
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#define RTC_AL_SEC 0x0018
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/* Min, Hour, Dom... register offset to RTC_TC_SEC */
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#define RTC_OFFSET_SEC 0
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#define RTC_OFFSET_MIN 1
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#define RTC_OFFSET_HOUR 2
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#define RTC_OFFSET_DOM 3
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#define RTC_OFFSET_DOW 4
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#define RTC_OFFSET_MTH 5
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#define RTC_OFFSET_YEAR 6
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#define RTC_OFFSET_COUNT 7
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#define RTC_AL_SEC 0x0018
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#define RTC_AL_SEC_MASK 0x003f
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#define RTC_AL_MIN_MASK 0x003f
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#define RTC_AL_HOU_MASK 0x001f
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#define RTC_AL_DOM_MASK 0x001f
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#define RTC_AL_DOW_MASK 0x0007
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#define RTC_AL_MTH_MASK 0x000f
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#define RTC_AL_YEA_MASK 0x007f
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#define RTC_PDN2 0x002e
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#define RTC_PDN1 0x002c
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#define RTC_SPAR0 0x0030
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#define RTC_PDN2_PWRON_ALARM BIT(4)
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#define RTC_PDN1_PWRON_TIME BIT(7)
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#define RTC_PDN2_PWRON_LOGO BIT(15)
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#define RTC_BBPU_RELOAD BIT(5)
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#define RTC_BBPU_KEY (0x43 << 8)
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#define RTC_PWRON_YEA RTC_PDN2
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#define RTC_PWRON_YEA_MASK 0x7f00
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#define RTC_PWRON_YEA_SHIFT 8
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#define RTC_PWRON_MTH RTC_PDN2
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#define RTC_PWRON_MTH_MASK 0x000f
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#define RTC_PWRON_MTH_SHIFT 0
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#define RTC_PWRON_SEC RTC_SPAR0
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#define RTC_PWRON_SEC_MASK 0x003f
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#define RTC_PWRON_SEC_SHIFT 0
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#define RTC_SPAR0_ALARM_BOOT BIT(8)
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#define RTC_PWRON_MIN RTC_SPAR1
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#define RTC_PWRON_MIN_MASK 0x003f
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#define RTC_PWRON_MIN_SHIFT 0
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#define RTC_PWRON_HOU RTC_SPAR1
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#define RTC_PWRON_HOU_MASK 0x07c0
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#define RTC_PWRON_HOU_SHIFT 6
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#define RTC_PWRON_DOM RTC_SPAR1
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#define RTC_PWRON_DOM_MASK 0xf800
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#define RTC_PWRON_DOM_SHIFT 11
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#define RTC_MIN_YEAR 1968
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#define RTC_BASE_YEAR 1900
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#define RTC_NUM_YEARS 128
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#define RTC_MIN_YEAR_OFFSET (RTC_MIN_YEAR - RTC_BASE_YEAR)
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struct mt6397_rtc {
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struct device *dev;
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struct rtc_device *rtc_dev;
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struct mutex lock;
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struct regmap *regmap;
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int irq;
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u32 addr_base;
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};
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static struct mt6397_rtc *mt_rtc;
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static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc)
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{
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unsigned long timeout = jiffies + HZ;
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int ret;
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u32 data;
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ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_WRTGR, 1);
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if (ret < 0)
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return ret;
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while (1) {
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ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_BBPU,
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&data);
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if (ret < 0)
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break;
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if (!(data & RTC_BBPU_CBUSY))
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break;
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if (time_after(jiffies, timeout)) {
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ret = -ETIMEDOUT;
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break;
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}
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cpu_relax();
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}
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return ret;
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}
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static void _mtk_rtc_save_pwron_alarm(void)
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{
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u32 pdn1, pdn2;
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int ret;
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ret = regmap_read(mt_rtc->regmap, mt_rtc->addr_base + RTC_PDN1, &pdn1);
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if (ret < 0)
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goto exit;
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ret = regmap_read(mt_rtc->regmap, mt_rtc->addr_base + RTC_PDN2, &pdn2);
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if (ret < 0)
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goto exit;
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pdn1 &= ~RTC_PDN1_PWRON_TIME;
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pdn2 |= RTC_PDN2_PWRON_ALARM;
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ret = regmap_write(mt_rtc->regmap,
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mt_rtc->addr_base + RTC_PDN1, pdn1);
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if (ret < 0)
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goto exit;
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ret = regmap_write(mt_rtc->regmap,
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mt_rtc->addr_base + RTC_PDN2, pdn2);
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if (ret < 0)
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goto exit;
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mtk_rtc_write_trigger(mt_rtc);
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return;
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exit:
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dev_err(mt_rtc->dev, "%s regmap write/read error!!!\n", __func__);
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}
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static void _mtk_rtc_set_alarm(struct rtc_time *tm)
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{
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u16 data[RTC_OFFSET_COUNT], data_b[RTC_OFFSET_COUNT];
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int ret;
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ret = regmap_bulk_read(mt_rtc->regmap, mt_rtc->addr_base + RTC_AL_SEC,
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data_b, RTC_OFFSET_COUNT);
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if (ret < 0)
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goto exit;
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data[RTC_OFFSET_SEC] = ((data_b[RTC_OFFSET_SEC] & ~(RTC_AL_SEC_MASK))
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| (tm->tm_sec & RTC_AL_SEC_MASK));
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data[RTC_OFFSET_MIN] = ((data_b[RTC_OFFSET_MIN] & ~(RTC_AL_MIN_MASK))
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| (tm->tm_min & RTC_AL_MIN_MASK));
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data[RTC_OFFSET_HOUR] = ((data_b[RTC_OFFSET_HOUR] & ~(RTC_AL_HOU_MASK))
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| (tm->tm_hour & RTC_AL_HOU_MASK));
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data[RTC_OFFSET_DOM] = ((data_b[RTC_OFFSET_DOM] & ~(RTC_AL_DOM_MASK))
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| (tm->tm_mday & RTC_AL_DOM_MASK));
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data[RTC_OFFSET_MTH] = ((data_b[RTC_OFFSET_MTH] & ~(RTC_AL_MTH_MASK))
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| (tm->tm_mon & RTC_AL_MTH_MASK));
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data[RTC_OFFSET_YEAR] = ((data_b[RTC_OFFSET_YEAR] & ~(RTC_AL_YEA_MASK))
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| (tm->tm_year & RTC_AL_YEA_MASK));
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dev_notice(mt_rtc->dev, "set al time = %04d/%02d/%02d %02d:%02d:%02d\n",
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tm->tm_year + RTC_MIN_YEAR, tm->tm_mon, tm->tm_mday,
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tm->tm_hour, tm->tm_min, tm->tm_sec);
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ret = regmap_bulk_write(mt_rtc->regmap,
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mt_rtc->addr_base + RTC_AL_SEC,
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data, RTC_OFFSET_COUNT);
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if (ret < 0)
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goto exit;
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ret = regmap_write(mt_rtc->regmap, mt_rtc->addr_base + RTC_AL_MASK,
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RTC_AL_MASK_DOW);
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if (ret < 0)
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goto exit;
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ret = regmap_update_bits(mt_rtc->regmap,
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mt_rtc->addr_base + RTC_IRQ_EN,
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RTC_IRQ_EN_ONESHOT_AL,
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RTC_IRQ_EN_ONESHOT_AL);
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if (ret < 0)
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goto exit;
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mtk_rtc_write_trigger(mt_rtc);
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return;
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exit:
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dev_err(mt_rtc->dev, "regmap write/read error!!!\n");
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}
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static void _rtc_get_tick(struct rtc_time *tm)
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{
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int ret;
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u16 data[RTC_OFFSET_COUNT];
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ret = regmap_bulk_read(mt_rtc->regmap, mt_rtc->addr_base + RTC_TC_SEC,
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data, RTC_OFFSET_COUNT);
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if (ret < 0)
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goto exit;
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tm->tm_sec = data[RTC_OFFSET_SEC];
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tm->tm_min = data[RTC_OFFSET_MIN];
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tm->tm_hour = data[RTC_OFFSET_HOUR];
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tm->tm_mday = data[RTC_OFFSET_DOM];
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tm->tm_mon = data[RTC_OFFSET_MTH];
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tm->tm_year = data[RTC_OFFSET_YEAR];
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return;
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exit:
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dev_err(mt_rtc->dev, "%s regmap write/read error!!!\n", __func__);
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}
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static void _mtk_rtc_get_tick_time(struct rtc_time *tm)
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{
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u32 bbpu, sec;
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int ret;
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ret = regmap_read(mt_rtc->regmap, mt_rtc->addr_base + RTC_BBPU, &bbpu);
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if (ret < 0)
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goto exit;
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bbpu |= RTC_BBPU_KEY | RTC_BBPU_RELOAD;
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ret = regmap_write(mt_rtc->regmap, mt_rtc->addr_base + RTC_BBPU, bbpu);
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if (ret < 0)
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goto exit;
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mtk_rtc_write_trigger(mt_rtc);
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_rtc_get_tick(tm);
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ret = regmap_read(mt_rtc->regmap, mt_rtc->addr_base + RTC_TC_SEC, &sec);
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if (ret < 0)
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goto exit;
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if (sec < tm->tm_sec) { /* SEC has carried */
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_rtc_get_tick(tm);
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}
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return;
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exit:
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dev_err(mt_rtc->dev, "%s regmap write/read error!!!\n", __func__);
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}
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static void _mtk_rtc_get_pwron_alarm_time(struct rtc_time *tm)
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{
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u32 spar1, pdn2, spar0;
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int ret;
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/*RTC_PWRON_SEC == SPAR0 */
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ret = regmap_read(mt_rtc->regmap,
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mt_rtc->addr_base + RTC_SPAR0, &spar0);
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if (ret < 0)
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goto exit;
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/*RTC_PWRON_DOM == RTC_PWRON_HOU */
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/*== RTC_PWRON_MIN == RTC_SPAR1*/
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ret = regmap_read(mt_rtc->regmap,
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mt_rtc->addr_base + RTC_SPAR1, &spar1);
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if (ret < 0)
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goto exit;
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/*RTC_PWRON_MTH == RTC_PWRON_YEAR== SPAR0 */
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ret = regmap_read(mt_rtc->regmap,
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mt_rtc->addr_base + RTC_PDN2, &pdn2);
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if (ret < 0)
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goto exit;
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dev_notice(mt_rtc->dev, "spar0=0x%x, spar1=0x%x, pdn2=0x%x!!!\n",
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spar0, spar1, pdn2);
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tm->tm_sec = (spar0 & RTC_PWRON_SEC_MASK) >> RTC_PWRON_SEC_SHIFT;
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tm->tm_min = (spar1 & RTC_PWRON_MIN_MASK) >> RTC_PWRON_MIN_SHIFT;
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tm->tm_hour = (spar1 & RTC_PWRON_HOU_MASK) >> RTC_PWRON_HOU_SHIFT;
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tm->tm_mday = (spar1 & RTC_PWRON_DOM_MASK) >> RTC_PWRON_DOM_SHIFT;
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tm->tm_mon = (pdn2 & RTC_PWRON_MTH_MASK) >> RTC_PWRON_MTH_SHIFT;
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tm->tm_year = (pdn2 & RTC_PWRON_YEA_MASK) >> RTC_PWRON_YEA_SHIFT;
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dev_notice(mt_rtc->dev,
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"year=0x%x,mon=0x%x,mday =0x%x hou=0x%x,min=0x%x,sec=0x%x\n",
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tm->tm_year, tm->tm_mon, tm->tm_mday,
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tm->tm_hour, tm->tm_min, tm->tm_sec);
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return;
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exit:
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dev_err(mt_rtc->dev, "%s regmap write/read error!!!\n", __func__);
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}
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#if defined(CONFIG_MTK_KERNEL_POWER_OFF_CHARGING)
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static void _mtk_rtc_set_alarm_boot(void)
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{
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u32 spar0;
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int ret;
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ret = regmap_read(mt_rtc->regmap,
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mt_rtc->addr_base + RTC_SPAR0, &spar0);
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if (ret < 0)
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goto exit;
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spar0 |= RTC_SPAR0_ALARM_BOOT;
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ret = regmap_write(mt_rtc->regmap,
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mt_rtc->addr_base + RTC_SPAR0, spar0);
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if (ret < 0)
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goto exit;
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mtk_rtc_write_trigger(mt_rtc);
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return;
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exit:
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dev_err(mt_rtc->dev, "regmap write/read error!!!\n");
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}
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#endif
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static bool _mtk_rtc_is_pwron_alarm(struct rtc_time *nowtm, struct rtc_time *tm)
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{
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u32 pdn1, sec;
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int ret;
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ret = regmap_read(mt_rtc->regmap, mt_rtc->addr_base + RTC_PDN1, &pdn1);
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if (ret < 0)
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goto exit;
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dev_notice(mt_rtc->dev, "pdn1 = 0x%x!!!\n", pdn1);
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/* power-on time is available */
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if (pdn1 & RTC_PDN1_PWRON_TIME) {
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_mtk_rtc_get_tick_time(nowtm);
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ret = regmap_read(mt_rtc->regmap,
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mt_rtc->addr_base + RTC_TC_SEC, &sec);
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if (ret < 0)
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goto exit;
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if (sec < nowtm->tm_sec) { /* SEC has carried */
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_mtk_rtc_get_tick_time(nowtm);
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}
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_mtk_rtc_get_pwron_alarm_time(tm);
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return true;
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}
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return false;
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exit:
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dev_err(mt_rtc->dev, "%s regmap write/read error!!!\n", __func__);
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return false;
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}
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static irqreturn_t mtk_rtc_irq_handler_thread(int irq, void *data)
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{
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struct mt6397_rtc *rtc = data;
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u32 irqsta, irqen;
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int ret;
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bool pwron_alm = false, pwron_alarm = false;
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struct rtc_time nowtm;
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struct rtc_time tm;
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mutex_lock(&rtc->lock);
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ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_STA, &irqsta);
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if ((ret >= 0) && (irqsta & RTC_IRQ_STA_AL)) {
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pwron_alarm = _mtk_rtc_is_pwron_alarm(&nowtm, &tm);
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nowtm.tm_year += RTC_MIN_YEAR;
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tm.tm_year += RTC_MIN_YEAR;
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dev_notice(mt_rtc->dev, "[RTC] nowtm = %d/%d/%d %d:%d:%d\n",
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nowtm.tm_year, nowtm.tm_mon, nowtm.tm_mday,
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nowtm.tm_hour, nowtm.tm_min, nowtm.tm_sec);
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if (pwron_alarm) {
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unsigned long now_time, time;
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now_time = mktime(nowtm.tm_year,
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nowtm.tm_mon,
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nowtm.tm_mday,
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nowtm.tm_hour,
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nowtm.tm_min,
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nowtm.tm_sec);
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time = mktime(tm.tm_year,
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tm.tm_mon,
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tm.tm_mday,
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tm.tm_hour,
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tm.tm_min,
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tm.tm_sec);
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/* power on */
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if (now_time >= time - 1 && now_time <= time + 4) {
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#if defined(CONFIG_MTK_KERNEL_POWER_OFF_CHARGING)
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if (get_boot_mode() ==
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KERNEL_POWER_OFF_CHARGING_BOOT
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|| get_boot_mode() ==
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LOW_POWER_OFF_CHARGING_BOOT) {
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dev_notice(mt_rtc->dev,
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"KPOC alarm!!!\n");
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time += 1;
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rtc_time_to_tm(time, &tm);
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tm.tm_year -= RTC_MIN_YEAR_OFFSET;
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tm.tm_mon += 1;
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/* tm.tm_sec += 1; */
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_mtk_rtc_set_alarm(&tm);
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_mtk_rtc_set_alarm_boot();
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mutex_unlock(&rtc->lock);
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machine_restart(NULL);
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} else {
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_mtk_rtc_save_pwron_alarm();
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pwron_alm = true;
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}
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#else
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_mtk_rtc_save_pwron_alarm();
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pwron_alm = true;
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#endif
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} else if (now_time < time) { /* set power-on alarm */
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tm.tm_year -= RTC_MIN_YEAR;
|
|
dev_notice(mt_rtc->dev,
|
|
"KPOC alarm again!!!\n");
|
|
if (tm.tm_sec == 0) {
|
|
tm.tm_sec = 59;
|
|
tm.tm_min -= 1;
|
|
} else {
|
|
tm.tm_sec -= 1;
|
|
}
|
|
_mtk_rtc_set_alarm(&tm);
|
|
}
|
|
}
|
|
rtc_update_irq(rtc->rtc_dev, 1, RTC_IRQF | RTC_AF);
|
|
irqen = irqsta & ~RTC_IRQ_EN_AL;
|
|
|
|
if (regmap_write(rtc->regmap, rtc->addr_base + RTC_IRQ_EN,
|
|
irqen) == 0)
|
|
mtk_rtc_write_trigger(rtc);
|
|
mutex_unlock(&rtc->lock);
|
|
|
|
return IRQ_HANDLED;
|
|
}
|
|
mutex_unlock(&rtc->lock);
|
|
return IRQ_NONE;
|
|
}
|
|
|
|
static int __mtk_rtc_read_time(struct mt6397_rtc *rtc,
|
|
struct rtc_time *tm, int *sec)
|
|
{
|
|
int ret;
|
|
u16 data[RTC_OFFSET_COUNT];
|
|
|
|
mutex_lock(&rtc->lock);
|
|
ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
|
|
data, RTC_OFFSET_COUNT);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
tm->tm_sec = data[RTC_OFFSET_SEC];
|
|
tm->tm_min = data[RTC_OFFSET_MIN];
|
|
tm->tm_hour = data[RTC_OFFSET_HOUR];
|
|
tm->tm_mday = data[RTC_OFFSET_DOM];
|
|
tm->tm_mon = data[RTC_OFFSET_MTH];
|
|
tm->tm_year = data[RTC_OFFSET_YEAR];
|
|
|
|
ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_TC_SEC, sec);
|
|
exit:
|
|
mutex_unlock(&rtc->lock);
|
|
return ret;
|
|
}
|
|
|
|
void rtc_read_pwron_alarm(struct rtc_wkalrm *alm)
|
|
{
|
|
struct rtc_time *tm;
|
|
u32 pdn1, pdn2;
|
|
int ret;
|
|
u16 data[RTC_OFFSET_COUNT];
|
|
|
|
if (alm == NULL)
|
|
return;
|
|
|
|
dev_notice(mt_rtc->dev, "%s!!!\n", __func__);
|
|
tm = &alm->time;
|
|
mutex_lock(&mt_rtc->lock);
|
|
ret = regmap_read(mt_rtc->regmap, mt_rtc->addr_base + RTC_PDN1, &pdn1);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
ret = regmap_read(mt_rtc->regmap, mt_rtc->addr_base + RTC_PDN2, &pdn2);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
ret = regmap_bulk_read(mt_rtc->regmap, mt_rtc->addr_base + RTC_AL_SEC,
|
|
data, RTC_OFFSET_COUNT);
|
|
if (ret < 0)
|
|
goto exit;
|
|
alm->enabled = (pdn1 & RTC_PDN1_PWRON_TIME
|
|
? (pdn2 & RTC_PDN2_PWRON_LOGO ? 3 : 2) : 0);
|
|
/* return Power-On Alarm bit */
|
|
alm->pending = !!(pdn2 & RTC_PDN2_PWRON_ALARM);
|
|
|
|
tm->tm_sec = data[RTC_OFFSET_SEC] & RTC_AL_SEC_MASK;
|
|
tm->tm_min = data[RTC_OFFSET_MIN] & RTC_AL_MIN_MASK;
|
|
tm->tm_hour = data[RTC_OFFSET_HOUR] & RTC_AL_HOU_MASK;
|
|
tm->tm_mday = data[RTC_OFFSET_DOM] & RTC_AL_DOM_MASK;
|
|
tm->tm_mon = data[RTC_OFFSET_MTH] & RTC_AL_MTH_MASK;
|
|
tm->tm_year = data[RTC_OFFSET_YEAR] & RTC_AL_YEA_MASK;
|
|
mutex_unlock(&mt_rtc->lock);
|
|
tm->tm_year += RTC_MIN_YEAR_OFFSET;
|
|
tm->tm_mon--;
|
|
dev_notice(mt_rtc->dev,
|
|
"power-on = %04d/%02d/%02d %02d:%02d:%02d (%d)(%d)\n",
|
|
tm->tm_year + 1900, tm->tm_mon + 1, tm->tm_mday, tm->tm_hour,
|
|
tm->tm_min, tm->tm_sec, alm->enabled, alm->pending);
|
|
return;
|
|
|
|
exit:
|
|
mutex_unlock(&mt_rtc->lock);
|
|
dev_err(mt_rtc->dev, "regmap write/read error!!!\n");
|
|
}
|
|
|
|
static void _rtc_set_pwron_alarm_time(struct rtc_time *tm)
|
|
{
|
|
u32 spar1, pdn2, spar0;
|
|
int ret;
|
|
u32 tm_year, tm_mon, tm_mday, tm_hour, tm_min, tm_sec;
|
|
|
|
dev_notice(mt_rtc->dev, "_rtc_save_pwron_time!!!\n");
|
|
/*RTC_PWRON_YEAR == RTC_PWRON_MTH==PDN2 */
|
|
ret = regmap_read(mt_rtc->regmap,
|
|
mt_rtc->addr_base + RTC_PDN2, &pdn2);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
/*RTC_PWRON_DOM == RTC_PWRON_HOU */
|
|
/*== RTC_PWRON_MIN == RTC_SPAR1*/
|
|
ret = regmap_read(mt_rtc->regmap,
|
|
mt_rtc->addr_base + RTC_SPAR1, &spar1);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
ret = regmap_read(mt_rtc->regmap,
|
|
mt_rtc->addr_base + RTC_SPAR0, &spar0);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
tm_year = (tm->tm_year << RTC_PWRON_YEA_SHIFT) & RTC_PWRON_YEA_MASK;
|
|
tm_mon = (tm->tm_mon << RTC_PWRON_MTH_SHIFT) & RTC_PWRON_MTH_MASK;
|
|
tm_mday = (tm->tm_mday << RTC_PWRON_DOM_SHIFT) & RTC_PWRON_DOM_MASK;
|
|
tm_hour = (tm->tm_hour << RTC_PWRON_HOU_SHIFT) & RTC_PWRON_HOU_MASK;
|
|
tm_min = (tm->tm_min << RTC_PWRON_MIN_SHIFT) & RTC_PWRON_MIN_MASK;
|
|
tm_sec = (tm->tm_sec << RTC_PWRON_SEC_SHIFT) & RTC_PWRON_SEC_MASK;
|
|
|
|
tm_year |= pdn2 & ~(RTC_PWRON_YEA_MASK);
|
|
ret = regmap_write(mt_rtc->regmap,
|
|
mt_rtc->addr_base + RTC_PDN2, tm_year);
|
|
if (ret < 0)
|
|
goto exit;
|
|
mtk_rtc_write_trigger(mt_rtc);
|
|
|
|
ret = regmap_read(mt_rtc->regmap,
|
|
mt_rtc->addr_base + RTC_PDN2, &pdn2);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
tm_mon |= pdn2 & ~(RTC_PWRON_MTH_MASK);
|
|
ret = regmap_write(mt_rtc->regmap,
|
|
mt_rtc->addr_base + RTC_PDN2, tm_mon);
|
|
if (ret < 0)
|
|
goto exit;
|
|
mtk_rtc_write_trigger(mt_rtc);
|
|
|
|
tm_mday |= spar1 & ~(RTC_PWRON_DOM_MASK);
|
|
ret = regmap_write(mt_rtc->regmap,
|
|
mt_rtc->addr_base + RTC_SPAR1, tm_mday);
|
|
if (ret < 0)
|
|
goto exit;
|
|
mtk_rtc_write_trigger(mt_rtc);
|
|
|
|
ret = regmap_read(mt_rtc->regmap,
|
|
mt_rtc->addr_base + RTC_SPAR1, &spar1);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
tm_hour |= spar1 & ~(RTC_PWRON_HOU_MASK);
|
|
ret = regmap_write(mt_rtc->regmap,
|
|
mt_rtc->addr_base + RTC_SPAR1, tm_hour);
|
|
if (ret < 0)
|
|
goto exit;
|
|
mtk_rtc_write_trigger(mt_rtc);
|
|
|
|
ret = regmap_read(mt_rtc->regmap,
|
|
mt_rtc->addr_base + RTC_SPAR1, &spar1);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
tm_min |= spar1 & ~(RTC_PWRON_MIN_MASK);
|
|
ret = regmap_write(mt_rtc->regmap,
|
|
mt_rtc->addr_base + RTC_SPAR1, tm_min);
|
|
if (ret < 0)
|
|
goto exit;
|
|
mtk_rtc_write_trigger(mt_rtc);
|
|
|
|
|
|
tm_sec |= spar0 & ~(RTC_PWRON_SEC_MASK);
|
|
ret = regmap_write(mt_rtc->regmap,
|
|
mt_rtc->addr_base + RTC_SPAR0, tm_sec);
|
|
if (ret < 0)
|
|
goto exit;
|
|
mtk_rtc_write_trigger(mt_rtc);
|
|
|
|
return;
|
|
|
|
exit:
|
|
dev_err(mt_rtc->dev, "regmap write/read error!!!\n");
|
|
}
|
|
|
|
void mtk_rtc_save_pwron_time(bool enable, struct rtc_time *tm, bool logo)
|
|
{
|
|
u32 pdn1, pdn2;
|
|
int ret;
|
|
|
|
dev_notice(mt_rtc->dev, "%s!!!\n", __func__);
|
|
_rtc_set_pwron_alarm_time(tm);
|
|
|
|
ret = regmap_read(mt_rtc->regmap, mt_rtc->addr_base + RTC_PDN2, &pdn2);
|
|
if (ret < 0)
|
|
goto exit;
|
|
ret = regmap_read(mt_rtc->regmap, mt_rtc->addr_base + RTC_PDN1, &pdn1);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
if (logo)
|
|
pdn2 |= RTC_PDN2_PWRON_LOGO;
|
|
else
|
|
pdn2 &= ~RTC_PDN2_PWRON_LOGO;
|
|
|
|
ret = regmap_write(mt_rtc->regmap, mt_rtc->addr_base + RTC_PDN2, pdn2);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
if (enable)
|
|
pdn1 |= RTC_PDN1_PWRON_TIME;
|
|
else
|
|
pdn1 &= ~RTC_PDN1_PWRON_TIME;
|
|
ret = regmap_write(mt_rtc->regmap, mt_rtc->addr_base + RTC_PDN1, pdn1);
|
|
if (ret < 0)
|
|
goto exit;
|
|
mtk_rtc_write_trigger(mt_rtc);
|
|
|
|
return;
|
|
|
|
exit:
|
|
dev_err(mt_rtc->dev, "regmap write/read error!!!\n");
|
|
}
|
|
|
|
static int mtk_rtc_read_time(struct device *dev, struct rtc_time *tm)
|
|
{
|
|
time64_t time;
|
|
struct mt6397_rtc *rtc = dev_get_drvdata(dev);
|
|
int days, sec, ret;
|
|
|
|
do {
|
|
ret = __mtk_rtc_read_time(rtc, tm, &sec);
|
|
if (ret < 0)
|
|
goto exit;
|
|
} while (sec < tm->tm_sec);
|
|
|
|
/* HW register use 7 bits to store year data, minus
|
|
* RTC_MIN_YEAR_OFFSET before write year data to register, and plus
|
|
* RTC_MIN_YEAR_OFFSET back after read year from register
|
|
*/
|
|
tm->tm_year += RTC_MIN_YEAR_OFFSET;
|
|
|
|
/* HW register start mon from one, but tm_mon start from zero. */
|
|
tm->tm_mon--;
|
|
time = rtc_tm_to_time64(tm);
|
|
|
|
/* rtc_tm_to_time64 covert Gregorian date to seconds since
|
|
* 01-01-1970 00:00:00, and this date is Thursday.
|
|
*/
|
|
days = div_s64(time, 86400);
|
|
tm->tm_wday = (days + 4) % 7;
|
|
|
|
exit:
|
|
return ret;
|
|
}
|
|
|
|
static int mtk_rtc_set_time(struct device *dev, struct rtc_time *tm)
|
|
{
|
|
struct mt6397_rtc *rtc = dev_get_drvdata(dev);
|
|
int ret;
|
|
u16 data[RTC_OFFSET_COUNT];
|
|
|
|
tm->tm_year -= RTC_MIN_YEAR_OFFSET;
|
|
tm->tm_mon++;
|
|
|
|
data[RTC_OFFSET_SEC] = tm->tm_sec;
|
|
data[RTC_OFFSET_MIN] = tm->tm_min;
|
|
data[RTC_OFFSET_HOUR] = tm->tm_hour;
|
|
data[RTC_OFFSET_DOM] = tm->tm_mday;
|
|
data[RTC_OFFSET_MTH] = tm->tm_mon;
|
|
data[RTC_OFFSET_YEAR] = tm->tm_year;
|
|
|
|
mutex_lock(&rtc->lock);
|
|
ret = regmap_bulk_write(rtc->regmap, rtc->addr_base + RTC_TC_SEC,
|
|
data, RTC_OFFSET_COUNT);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
/* Time register write to hardware after call trigger function */
|
|
ret = mtk_rtc_write_trigger(rtc);
|
|
|
|
exit:
|
|
mutex_unlock(&rtc->lock);
|
|
return ret;
|
|
}
|
|
|
|
static int mtk_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
|
|
{
|
|
struct rtc_time *tm = &alm->time;
|
|
struct mt6397_rtc *rtc = dev_get_drvdata(dev);
|
|
u32 irqen, pdn2;
|
|
int ret;
|
|
u16 data[RTC_OFFSET_COUNT];
|
|
|
|
mutex_lock(&rtc->lock);
|
|
ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_EN, &irqen);
|
|
if (ret < 0)
|
|
goto err_exit;
|
|
ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_PDN2, &pdn2);
|
|
if (ret < 0)
|
|
goto err_exit;
|
|
|
|
ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_AL_SEC,
|
|
data, RTC_OFFSET_COUNT);
|
|
if (ret < 0)
|
|
goto err_exit;
|
|
|
|
alm->enabled = !!(irqen & RTC_IRQ_EN_AL);
|
|
alm->pending = !!(pdn2 & RTC_PDN2_PWRON_ALARM);
|
|
mutex_unlock(&rtc->lock);
|
|
|
|
tm->tm_sec = data[RTC_OFFSET_SEC] & RTC_AL_SEC_MASK;
|
|
tm->tm_min = data[RTC_OFFSET_MIN] & RTC_AL_MIN_MASK;
|
|
tm->tm_hour = data[RTC_OFFSET_HOUR] & RTC_AL_HOU_MASK;
|
|
tm->tm_mday = data[RTC_OFFSET_DOM] & RTC_AL_DOM_MASK;
|
|
tm->tm_mon = data[RTC_OFFSET_MTH] & RTC_AL_MTH_MASK;
|
|
tm->tm_year = data[RTC_OFFSET_YEAR] & RTC_AL_YEA_MASK;
|
|
|
|
tm->tm_year += RTC_MIN_YEAR_OFFSET;
|
|
tm->tm_mon--;
|
|
|
|
return 0;
|
|
err_exit:
|
|
mutex_unlock(&rtc->lock);
|
|
return ret;
|
|
}
|
|
|
|
static int mtk_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
|
|
{
|
|
struct rtc_time *tm = &alm->time;
|
|
struct mt6397_rtc *rtc = dev_get_drvdata(dev);
|
|
int ret;
|
|
u16 data[RTC_OFFSET_COUNT];
|
|
u32 irqsta, irqen, pdn2;
|
|
|
|
tm->tm_year -= RTC_MIN_YEAR_OFFSET;
|
|
tm->tm_mon++;
|
|
|
|
ret = regmap_bulk_read(rtc->regmap, rtc->addr_base + RTC_AL_SEC,
|
|
data, RTC_OFFSET_COUNT);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
data[RTC_OFFSET_SEC] = ((data[RTC_OFFSET_SEC] & ~(RTC_AL_SEC_MASK)) |
|
|
(tm->tm_sec & RTC_AL_SEC_MASK));
|
|
data[RTC_OFFSET_MIN] = ((data[RTC_OFFSET_MIN] & ~(RTC_AL_MIN_MASK)) |
|
|
(tm->tm_min & RTC_AL_MIN_MASK));
|
|
data[RTC_OFFSET_HOUR] = ((data[RTC_OFFSET_HOUR] & ~(RTC_AL_HOU_MASK)) |
|
|
(tm->tm_hour & RTC_AL_HOU_MASK));
|
|
data[RTC_OFFSET_DOM] = ((data[RTC_OFFSET_DOM] & ~(RTC_AL_DOM_MASK)) |
|
|
(tm->tm_mday & RTC_AL_DOM_MASK));
|
|
data[RTC_OFFSET_MTH] = ((data[RTC_OFFSET_MTH] & ~(RTC_AL_MTH_MASK)) |
|
|
(tm->tm_mon & RTC_AL_MTH_MASK));
|
|
data[RTC_OFFSET_YEAR] = ((data[RTC_OFFSET_YEAR] & ~(RTC_AL_YEA_MASK)) |
|
|
(tm->tm_year & RTC_AL_YEA_MASK));
|
|
|
|
dev_notice(rtc->dev,
|
|
"set al time = %04d/%02d/%02d %02d:%02d:%02d (%d)\n",
|
|
tm->tm_year + RTC_MIN_YEAR, tm->tm_mon, tm->tm_mday,
|
|
tm->tm_hour, tm->tm_min, tm->tm_sec, alm->enabled);
|
|
|
|
mutex_lock(&rtc->lock);
|
|
switch (alm->enabled) {
|
|
case 2:
|
|
/* enable power-on alarm */
|
|
mtk_rtc_save_pwron_time(true, tm, false);
|
|
break;
|
|
case 3:
|
|
/* enable power-on alarm with logo */
|
|
mtk_rtc_save_pwron_time(true, tm, true);
|
|
break;
|
|
case 4:
|
|
/* disable power-on alarm */
|
|
mtk_rtc_save_pwron_time(false, tm, false);
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
|
|
ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_EN, &irqen);
|
|
if (ret < 0)
|
|
goto exit;
|
|
irqen &= ~RTC_IRQ_EN_AL;
|
|
ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_PDN2, &pdn2);
|
|
if (ret < 0)
|
|
goto exit;
|
|
pdn2 &= ~RTC_PDN2_PWRON_ALARM;
|
|
|
|
ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_IRQ_EN, irqen);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_PDN2, pdn2);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
mtk_rtc_write_trigger(rtc);
|
|
ret = regmap_read(rtc->regmap, rtc->addr_base + RTC_IRQ_STA, &irqsta);
|
|
if (ret < 0)
|
|
goto exit;
|
|
|
|
if (alm->enabled) {
|
|
ret = regmap_bulk_write(rtc->regmap,
|
|
rtc->addr_base + RTC_AL_SEC,
|
|
data, RTC_OFFSET_COUNT);
|
|
if (ret < 0)
|
|
goto exit;
|
|
ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_AL_MASK,
|
|
RTC_AL_MASK_DOW);
|
|
if (ret < 0)
|
|
goto exit;
|
|
ret = regmap_update_bits(rtc->regmap,
|
|
rtc->addr_base + RTC_IRQ_EN,
|
|
RTC_IRQ_EN_ONESHOT_AL,
|
|
RTC_IRQ_EN_ONESHOT_AL);
|
|
if (ret < 0)
|
|
goto exit;
|
|
} else {
|
|
ret = regmap_update_bits(rtc->regmap,
|
|
rtc->addr_base + RTC_IRQ_EN,
|
|
RTC_IRQ_EN_ONESHOT_AL, 0);
|
|
if (ret < 0)
|
|
goto exit;
|
|
}
|
|
|
|
/* All alarm time register write to hardware after calling
|
|
* mtk_rtc_write_trigger. This can avoid race condition if alarm
|
|
* occur happen during writing alarm time register.
|
|
*/
|
|
ret = mtk_rtc_write_trigger(rtc);
|
|
exit:
|
|
mutex_unlock(&rtc->lock);
|
|
return ret;
|
|
}
|
|
|
|
static const struct rtc_class_ops mtk_rtc_ops = {
|
|
.read_time = mtk_rtc_read_time,
|
|
.set_time = mtk_rtc_set_time,
|
|
.read_alarm = mtk_rtc_read_alarm,
|
|
.set_alarm = mtk_rtc_set_alarm,
|
|
};
|
|
|
|
static int mtk_rtc_probe(struct platform_device *pdev)
|
|
{
|
|
struct resource *res;
|
|
struct mt6397_chip *mt6397_chip = dev_get_drvdata(pdev->dev.parent);
|
|
struct mt6397_rtc *rtc;
|
|
int ret;
|
|
|
|
rtc = devm_kzalloc(&pdev->dev, sizeof(struct mt6397_rtc), GFP_KERNEL);
|
|
if (!rtc)
|
|
return -ENOMEM;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!res)
|
|
return -EINVAL;
|
|
rtc->addr_base = res->start;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
rtc->irq = irq_create_mapping(mt6397_chip->irq_domain, res->start);
|
|
if (rtc->irq <= 0)
|
|
return -EINVAL;
|
|
|
|
rtc->regmap = mt6397_chip->regmap;
|
|
rtc->dev = &pdev->dev;
|
|
mutex_init(&rtc->lock);
|
|
|
|
mt_rtc = rtc;
|
|
platform_set_drvdata(pdev, rtc);
|
|
|
|
rtc->rtc_dev = devm_rtc_allocate_device(rtc->dev);
|
|
if (IS_ERR(rtc->rtc_dev))
|
|
return PTR_ERR(rtc->rtc_dev);
|
|
|
|
ret = request_threaded_irq(rtc->irq, NULL,
|
|
mtk_rtc_irq_handler_thread,
|
|
IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
|
|
"mt6397-rtc", rtc);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "Failed to request alarm IRQ: %d: %d\n",
|
|
rtc->irq, ret);
|
|
goto out_dispose_irq;
|
|
}
|
|
|
|
device_init_wakeup(&pdev->dev, 1);
|
|
|
|
rtc->rtc_dev->ops = &mtk_rtc_ops;
|
|
|
|
ret = rtc_register_device(rtc->rtc_dev);
|
|
if (ret) {
|
|
dev_err(&pdev->dev, "register rtc device failed\n");
|
|
goto out_free_irq;
|
|
}
|
|
|
|
return 0;
|
|
|
|
out_free_irq:
|
|
free_irq(rtc->irq, rtc->rtc_dev);
|
|
out_dispose_irq:
|
|
irq_dispose_mapping(rtc->irq);
|
|
return ret;
|
|
}
|
|
|
|
static int mtk_rtc_remove(struct platform_device *pdev)
|
|
{
|
|
struct mt6397_rtc *rtc = platform_get_drvdata(pdev);
|
|
|
|
free_irq(rtc->irq, rtc->rtc_dev);
|
|
irq_dispose_mapping(rtc->irq);
|
|
|
|
return 0;
|
|
}
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int mt6397_rtc_suspend(struct device *dev)
|
|
{
|
|
struct mt6397_rtc *rtc = dev_get_drvdata(dev);
|
|
|
|
if (device_may_wakeup(dev))
|
|
enable_irq_wake(rtc->irq);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int mt6397_rtc_resume(struct device *dev)
|
|
{
|
|
struct mt6397_rtc *rtc = dev_get_drvdata(dev);
|
|
|
|
if (device_may_wakeup(dev))
|
|
disable_irq_wake(rtc->irq);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend,
|
|
mt6397_rtc_resume);
|
|
|
|
static const struct of_device_id mt6397_rtc_of_match[] = {
|
|
{ .compatible = "mediatek,mt6397-rtc", },
|
|
{ .compatible = "mediatek,mt6323-rtc", },
|
|
{ .compatible = "mediatek,mt6392-rtc", },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match);
|
|
|
|
static struct platform_driver mtk_rtc_driver = {
|
|
.driver = {
|
|
.name = "mt6397-rtc",
|
|
.of_match_table = mt6397_rtc_of_match,
|
|
.pm = &mt6397_pm_ops,
|
|
},
|
|
.probe = mtk_rtc_probe,
|
|
.remove = mtk_rtc_remove,
|
|
};
|
|
|
|
module_platform_driver(mtk_rtc_driver);
|
|
|
|
MODULE_LICENSE("GPL v2");
|
|
MODULE_AUTHOR("Tianping Fang <tianping.fang@mediatek.com>");
|
|
MODULE_DESCRIPTION("RTC Driver for MediaTek MT6397 PMIC");
|
|
MODULE_ALIAS("platform:mt6397-rtc");
|