threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
79 lines
1.6 KiB
C
79 lines
1.6 KiB
C
/*
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* Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
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* Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2
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* as published by the Free Software Foundation
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "mt7601u.h"
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int mt7601u_wait_asic_ready(struct mt7601u_dev *dev)
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{
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int i = 100;
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u32 val;
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do {
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if (test_bit(MT7601U_STATE_REMOVED, &dev->state))
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return -EIO;
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val = mt7601u_rr(dev, MT_MAC_CSR0);
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if (val && ~val)
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return 0;
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udelay(10);
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} while (i--);
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return -EIO;
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}
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bool mt76_poll(struct mt7601u_dev *dev, u32 offset, u32 mask, u32 val,
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int timeout)
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{
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u32 cur;
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timeout /= 10;
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do {
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if (test_bit(MT7601U_STATE_REMOVED, &dev->state))
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return false;
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cur = mt7601u_rr(dev, offset) & mask;
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if (cur == val)
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return true;
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udelay(10);
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} while (timeout-- > 0);
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dev_err(dev->dev, "Error: Time out with reg %08x\n", offset);
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return false;
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}
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bool mt76_poll_msec(struct mt7601u_dev *dev, u32 offset, u32 mask, u32 val,
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int timeout)
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{
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u32 cur;
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timeout /= 10;
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do {
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if (test_bit(MT7601U_STATE_REMOVED, &dev->state))
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return false;
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cur = mt7601u_rr(dev, offset) & mask;
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if (cur == val)
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return true;
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msleep(10);
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} while (timeout-- > 0);
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dev_err(dev->dev, "Error: Time out with reg %08x\n", offset);
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return false;
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}
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