threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
350 lines
8.3 KiB
C
350 lines
8.3 KiB
C
/*
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* Copyright (C) 2017 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/hie.h>
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#include "mtk_secure_api.h"
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/* map from AES Spec */
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enum {
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MSDC_CRYPTO_XTS_AES = 4,
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MSDC_CRYPTO_AES_CBC_ESSIV = 9,
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MSDC_CRYPTO_BITLOCKER = 17,
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MSDC_CRYPTO_AES_ECB = 0,
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MSDC_CRYPTO_AES_CBC = 1,
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MSDC_CRYPTO_AES_CTR = 2,
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MSDC_CRYPTO_AES_CBC_MAC = 3,
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} aes_mode;
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enum {
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BIT_128 = 0,
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BIT_192 = 1,
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BIT_256 = 2,
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BIT_0 = 4,
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};
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static void msdc_crypto_switch_config(struct msdc_host *host,
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struct request *req,
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u32 block_address, u32 dir)
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{
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void __iomem *base = host->base;
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u32 aes_mode_current = 0, aes_sw_reg = 0;
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u32 ctr[4] = {0};
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unsigned long polling_tmo = 0;
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u64 hw_hie_iv_num = 0;
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/* 1. set ctr */
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aes_sw_reg = MSDC_READ32(EMMC52_AES_EN);
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hw_hie_iv_num = hie_get_iv(req);
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if (aes_sw_reg & EMMC52_AES_SWITCH_VALID0)
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MSDC_GET_FIELD(EMMC52_AES_CFG_GP0,
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EMMC52_AES_MODE_0, aes_mode_current);
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else if (aes_sw_reg & EMMC52_AES_SWITCH_VALID1)
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MSDC_GET_FIELD(EMMC52_AES_CFG_GP1,
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EMMC52_AES_MODE_1, aes_mode_current);
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else {
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pr_notice("MSDC: EMMC52_AES_SWITCH_VALID error in msdc reg\n");
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WARN_ON(1);
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return;
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}
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switch (aes_mode_current) {
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case MSDC_CRYPTO_XTS_AES:
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case MSDC_CRYPTO_AES_CBC_ESSIV:
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case MSDC_CRYPTO_BITLOCKER:
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{
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if (hw_hie_iv_num) {
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ctr[0] = hw_hie_iv_num & 0xffffffff;
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ctr[1] = (hw_hie_iv_num >> 32) & 0xffffffff;
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} else {
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ctr[0] = block_address;
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}
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break;
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}
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case MSDC_CRYPTO_AES_ECB:
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case MSDC_CRYPTO_AES_CBC:
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break;
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case MSDC_CRYPTO_AES_CTR:
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{
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if (hw_hie_iv_num) {
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ctr[0] = hw_hie_iv_num & 0xffffffff;
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ctr[1] = (hw_hie_iv_num >> 32) & 0xffffffff;
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} else {
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ctr[0] = block_address;
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}
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break;
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}
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case MSDC_CRYPTO_AES_CBC_MAC:
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break;
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default:
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pr_notice("msdc unknown aes mode\n");
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WARN_ON(1);
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return;
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}
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if (aes_sw_reg & EMMC52_AES_SWITCH_VALID0) {
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MSDC_WRITE32(EMMC52_AES_CTR0_GP0, ctr[0]);
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MSDC_WRITE32(EMMC52_AES_CTR1_GP0, ctr[1]);
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MSDC_WRITE32(EMMC52_AES_CTR2_GP0, ctr[2]);
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MSDC_WRITE32(EMMC52_AES_CTR3_GP0, ctr[3]);
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} else {
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MSDC_WRITE32(EMMC52_AES_CTR0_GP1, ctr[0]);
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MSDC_WRITE32(EMMC52_AES_CTR1_GP1, ctr[1]);
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MSDC_WRITE32(EMMC52_AES_CTR2_GP1, ctr[2]);
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MSDC_WRITE32(EMMC52_AES_CTR3_GP1, ctr[3]);
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}
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/* 2. enable AES path */
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MSDC_CLR_BIT32(EMMC52_AES_SWST, EMMC52_AES_BYPASS);
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/* 3. AES switch start (flush the configure) */
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if (dir == DMA_TO_DEVICE) {
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MSDC_SET_BIT32(EMMC52_AES_SWST, EMMC52_AES_SWITCH_START_ENC);
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polling_tmo = jiffies + POLLING_BUSY;
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while (MSDC_READ32(EMMC52_AES_SWST)
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& EMMC52_AES_SWITCH_START_ENC) {
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if (time_after(jiffies, polling_tmo)) {
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pr_notice(
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"msdc%d, error: trigger AES ENC timeout!\n",
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host->id);
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WARN_ON(1);
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}
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}
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} else{
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MSDC_SET_BIT32(EMMC52_AES_SWST, EMMC52_AES_SWITCH_START_DEC);
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polling_tmo = jiffies + POLLING_BUSY;
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while (MSDC_READ32(EMMC52_AES_SWST)
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& EMMC52_AES_SWITCH_START_DEC) {
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if (time_after(jiffies, polling_tmo)) {
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pr_notice(
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"msdc%d, error: trigger DEC AES DEC timeout!\n",
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host->id);
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WARN_ON(1);
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}
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}
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}
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}
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static void msdc_pre_crypto(struct mmc_host *mmc, struct mmc_request *mrq)
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{
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struct msdc_host *host = mmc_priv(mmc);
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struct mmc_command *cmd = mrq->cmd;
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u32 dir = DMA_FROM_DEVICE;
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u32 blk_addr = 0;
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u32 is_fde = 0, is_fbe = 0;
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#if defined(CONFIG_MTK_HW_FDE)
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unsigned int key_idx;
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#endif
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#ifdef CONFIG_HIE
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int err;
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#endif
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struct request *req = NULL;
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struct mmc_queue_req *mq_rq = NULL;
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struct mmc_blk_request *brq;
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#ifdef CONFIG_MTK_EMMC_CQ_SUPPORT
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struct mmc_async_req *areq;
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#endif
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if (!host->hw || !mmc->card)
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return;
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if (host->hw->host_function != MSDC_EMMC)
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return;
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#ifdef CONFIG_MTK_EMMC_CQ_SUPPORT
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/* CMDQ Command */
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if (check_mmc_cmd4647(cmd->opcode)) {
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areq = mmc->areq_que[(cmd->arg >> 16) & 0x1f];
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mq_rq = container_of(areq, struct mmc_queue_req, areq);
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blk_addr = mq_rq->brq.que.arg;
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req = mmc_queue_req_to_req(mq_rq);
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goto check_hw_crypto;
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}
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#endif
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/* Normal Read Write Command */
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if (mrq->is_mmc_req &&
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(check_mmc_cmd1718(cmd->opcode) ||
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check_mmc_cmd2425(cmd->opcode))) {
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brq = container_of(mrq, struct mmc_blk_request, mrq);
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mq_rq = container_of(brq, struct mmc_queue_req, brq);
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blk_addr = cmd->arg;
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req = mmc_queue_req_to_req(mq_rq);
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goto check_hw_crypto;
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}
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return;
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check_hw_crypto:
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dir = cmd->data->flags & MMC_DATA_READ ?
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DMA_FROM_DEVICE : DMA_TO_DEVICE;
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#if defined(CONFIG_MTK_HW_FDE)
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if (req->bio && req->bio->bi_hw_fde) {
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is_fde = 1;
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key_idx = req->bio->bi_key_idx;
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}
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#endif
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#ifdef CONFIG_HIE
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if (hie_request_crypted(req))
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is_fbe = 1;
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#endif
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if (is_fde || is_fbe) {
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#if defined(CONFIG_MTK_HW_FDE)
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if (is_fde &&
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(!host->is_crypto_init ||
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(host->key_idx != key_idx))) {
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/* fde init */
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mt_secure_call(MTK_SIP_KERNEL_HW_FDE_MSDC_CTL,
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(1 << 3), 4, 1, 0);
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host->is_crypto_init = true;
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host->key_idx = key_idx;
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}
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#endif
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#ifdef CONFIG_HIE
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if (is_fbe) {
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if (!host->is_crypto_init) {
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/* fbe init */
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mt_secure_call(MTK_SIP_KERNEL_HW_FDE_MSDC_CTL,
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(1 << 0), 4, 1, 0);
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host->is_crypto_init = true;
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}
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if (dir == DMA_TO_DEVICE)
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err = hie_encrypt(msdc_hie_get_dev(), req,
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host);
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else
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err = hie_decrypt(msdc_hie_get_dev(), req,
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host);
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if (err) {
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err = -EIO;
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ERR_MSG(
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"%s: fail in crypto hook, req: %p, err %d\n",
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__func__, req, err);
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WARN_ON(1);
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return;
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}
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if (hie_is_nocrypt())
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return;
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if (hie_is_dummy()) {
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struct mmc_data *data = cmd->data;
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if (dir == DMA_TO_DEVICE &&
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msdc_use_async_dma(data->host_cookie)) {
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dma_unmap_sg(mmc_dev(mmc), data->sg,
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data->sg_len, dir);
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dma_map_sg(mmc_dev(mmc), data->sg,
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data->sg_len, dir);
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}
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return;
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}
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}
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#endif
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if (!mmc_card_blockaddr(mmc->card))
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blk_addr = blk_addr >> 9;
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/* Check data size with 16bytes */
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WARN_ON(host->dma.xfersz & 0xf);
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/* Check data addressw with 16bytes alignment */
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WARN_ON((host->dma.gpd_addr & 0xf)
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|| (host->dma.bd_addr & 0xf));
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msdc_crypto_switch_config(host, req, blk_addr, dir);
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}
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}
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static void msdc_post_crypto(struct msdc_host *host)
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{
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void __iomem *base = host->base;
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/* disable AES path by set bypass bit */
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MSDC_SET_BIT32(EMMC52_AES_SWST, EMMC52_AES_BYPASS);
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}
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#ifdef CONFIG_HIE
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/* configure request for HIE */
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static int msdc_hie_cfg_request(unsigned int mode, const char *key,
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int len, struct request *req, void *priv)
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{
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struct msdc_host *host = (struct msdc_host *)priv;
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void __iomem *base = host->base;
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u32 iv[4] = {0}, aes_key[8] = {0}, aes_tkey[8] = {0};
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u32 data_unit_size, i, half_len;
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u8 key_bit, aes_mode;
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if (mode & BC_AES_256_XTS) {
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aes_mode = MSDC_CRYPTO_XTS_AES;
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key_bit = BIT_256;
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WARN_ON(len != 64);
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} else if (mode & BC_AES_128_XTS) {
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aes_mode = MSDC_CRYPTO_XTS_AES;
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key_bit = BIT_128;
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WARN_ON(len != 32);
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} else {
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ERR_MSG("%s: unknown mode 0x%x\n", __func__, mode);
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WARN_ON(1);
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return -EIO;
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}
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/*
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* limit half_len as u32 * 8
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* prevent local buffer overflow
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*/
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half_len = min_t(u32, len / 2, sizeof(u32) * 8);
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/* Split key into key & tkey */
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memcpy(aes_key, &key[0], half_len);
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memcpy(aes_tkey, &key[half_len], half_len);
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/* eMMC block size 512bytes */
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data_unit_size = (1 << 9);
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/* AES config */
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MSDC_WRITE32(EMMC52_AES_CFG_GP1,
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(data_unit_size << 16 | key_bit << 8 | aes_mode << 0));
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/* IV */
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for (i = 0; i < 4; i++)
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MSDC_WRITE32((EMMC52_AES_IV0_GP1 + i * 4), iv[i]);
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/* KEY */
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for (i = 0; i < 8; i++)
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MSDC_WRITE32((EMMC52_AES_KEY0_GP1 + i * 4), aes_key[i]);
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/* TKEY */
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for (i = 0; i < 8; i++)
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MSDC_WRITE32((EMMC52_AES_TKEY0_GP1 + i * 4), aes_tkey[i]);
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return 0;
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}
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struct hie_dev msdc_hie_dev = {
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.name = "msdc",
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.mode = (BC_AES_256_XTS | BC_AES_128_XTS),
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.encrypt = msdc_hie_cfg_request,
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.decrypt = msdc_hie_cfg_request,
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.priv = NULL,
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};
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struct hie_dev *msdc_hie_get_dev(void)
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{
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return &msdc_hie_dev;
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}
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static void msdc_hie_register(struct msdc_host *host)
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{
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if (host->hw->host_function == MSDC_EMMC)
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hie_register_device(&msdc_hie_dev);
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}
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#endif
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