threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
85 lines
2.1 KiB
C
85 lines
2.1 KiB
C
/*
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* Copyright (C) 2015 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __DDP_CLK_MGR_H__
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#define __DDP_CLK_MGR_H__
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#include "ddp_hal.h"
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#include <linux/clk.h>
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/* display clk id
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* -- by chip
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*/
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enum DDP_CLK_ID {
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/* top clk */
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CLK_MM_MTCMOS = 0,
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CLK_SMI_COMMON,
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CLK_SMI_LARB0,
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CLK_GALS_COMM0,
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CLK_GALS_COMM1,
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/* module clk */
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CLK_DISP_OVL0,
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CLK_DISP_OVL0_2L,
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CLK_DISP_RDMA0,
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CLK_DISP_WDMA0,
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CLK_DISP_COLOR0,
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CLK_DISP_CCORR0,
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CLK_DISP_AAL0,
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CLK_DISP_GAMMA0,
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CLK_DISP_DITHER0,
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CLK_DSI0_MM_CLK,
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CLK_DSI0_IF_CLK,
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CLK_IMG_DL_RELAY,
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CLK_MM_26M,
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CLK_DISP_RSZ0,
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MIPI_26M,
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/* PWM clk */
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MUX_PWM,
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DISP_PWM,
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CLK26M,
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UNIVPLL2_D4,
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ULPOSC1_D2,
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ULPOSC1_D8,
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MAX_DISP_CLK_CNT
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};
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struct ddp_clk {
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struct clk *pclk;
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const char *clk_name;
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int refcnt;
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/* bit 0: main display , bit 1: second display */
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unsigned int belong_to;
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enum DISP_MODULE_ENUM module_id;
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};
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const char *ddp_get_clk_name(unsigned int n);
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int ddp_set_clk_handle(struct clk *pclk, unsigned int n);
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int ddp_clk_prepare_enable(enum DDP_CLK_ID id);
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int ddp_clk_disable_unprepare(enum DDP_CLK_ID id);
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int ddp_clk_set_parent(enum DDP_CLK_ID id, enum DDP_CLK_ID parent);
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int ddp_set_mipi26m(enum DISP_MODULE_ENUM module, int en);
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int ddp_parse_apmixed_base(void);
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int ddp_main_modules_clk_on(void);
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int ddp_main_modules_clk_off(void);
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int ddp_module_clk_enable(enum DISP_MODULE_TYPE_ENUM module_t);
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int ddp_module_clk_disable(enum DISP_MODULE_TYPE_ENUM module_t);
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enum DDP_CLK_ID ddp_get_module_clk_id(enum DISP_MODULE_ENUM module_id);
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void ddp_clk_force_on(unsigned int on);
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int ddp_clk_check(void);
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int ddp_clk_enable_by_module(enum DISP_MODULE_ENUM module);
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int ddp_clk_disable_by_module(enum DISP_MODULE_ENUM module);
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#endif
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