threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
95 lines
2.1 KiB
C
95 lines
2.1 KiB
C
/*
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* Copyright (C) 2015 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#define LOG_TAG "WDMA"
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#include "ddp_log.h"
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#include <linux/delay.h>
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#include "ddp_reg.h"
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#include "ddp_matrix_para.h"
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#include "ddp_info.h"
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#include "ddp_wdma.h"
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#include "ddp_wdma_ex.h"
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#include "primary_display.h"
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#ifdef CONFIG_MTK_M4U
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#include "m4u.h"
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#endif
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#define ALIGN_TO(x, n) \
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(((x) + ((n) - 1)) & ~((n) - 1))
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unsigned int wdma_index(enum DISP_MODULE_ENUM module)
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{
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int idx = 0;
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switch (module) {
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case DISP_MODULE_WDMA0:
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idx = 0;
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break;
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case DISP_MODULE_WDMA1:
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idx = 1;
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break;
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default:
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DDPERR("[DDP] error: invalid wdma module=%d\n",
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module); /* invalid module */
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ASSERT(0);
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}
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return idx;
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}
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int wdma_stop(enum DISP_MODULE_ENUM module, void *handle)
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{
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unsigned int idx = wdma_index(module);
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DISP_REG_SET(handle,
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idx * DISP_WDMA_INDEX_OFFSET + DISP_REG_WDMA_INTEN, 0x00);
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DISP_REG_SET(handle,
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idx * DISP_WDMA_INDEX_OFFSET + DISP_REG_WDMA_EN, 0x00);
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DISP_REG_SET(handle,
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idx * DISP_WDMA_INDEX_OFFSET + DISP_REG_WDMA_INTSTA, 0x00);
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return 0;
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}
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int wdma_reset(enum DISP_MODULE_ENUM module, void *handle)
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{
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unsigned int delay_cnt = 0;
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unsigned int idx = wdma_index(module);
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DISP_REG_SET(handle, idx * DISP_WDMA_INDEX_OFFSET +
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DISP_REG_WDMA_RST, 0x01); /* trigger soft reset */
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if (!handle) {
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while ((DISP_REG_GET(idx * DISP_WDMA_INDEX_OFFSET +
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DISP_REG_WDMA_FLOW_CTRL_DBG) &
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0x1) == 0) {
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delay_cnt++;
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udelay(10);
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if (delay_cnt > 2000) {
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DDPERR("wdma%d reset timeout!\n", idx);
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break;
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}
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}
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} else {
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/* add comdq polling */
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}
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/* trigger soft reset */
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DISP_REG_SET(handle,
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idx * DISP_WDMA_INDEX_OFFSET + DISP_REG_WDMA_RST, 0x0);
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return 0;
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}
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unsigned int ddp_wdma_get_cur_addr(void)
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{
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return INREG32(DISP_REG_WDMA_DST_ADDR0);
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}
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