threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
171 lines
4.9 KiB
C
171 lines
4.9 KiB
C
/*
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* drivers/misc/mediatek/pmic/mt6360/inc/mt6360_pmic.h
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*
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* Copyright (C) 2018 Mediatek Technology Corp.
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* cy_huang <cy_huang@richtek.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
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*/
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#ifndef __MT6360_PMIC_H
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#define __MT6360_PMIC_H
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#include <linux/mutex.h>
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#include <linux/crc8.h>
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#include <linux/interrupt.h>
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#include <linux/of.h>
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#include "config.h"
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#include <mt-plat/rt-regmap.h>
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#define mt_dbg(dev, fmt, ...) \
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do { \
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if (dbg_log_en) \
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dev_dbg(dev, fmt, ##__VA_ARGS__); \
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} while (0)
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enum {
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MT6360_PMIC_BUCK1,
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MT6360_PMIC_BUCK2,
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MT6360_PMIC_LDO6,
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MT6360_PMIC_LDO7,
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MT6360_PMIC_MAX,
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};
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#define MT6360_SYS_CTRLS_NUM (3)
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#define MT6360_BUCK_CTRLS_NUM (8)
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#define MT6360_LDO_CTRLS_NUM (5)
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struct mt6360_pmic_platform_data {
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struct regulator_init_data *init_data[MT6360_PMIC_MAX];
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struct resource *irq_res;
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int irq_res_cnt;
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u32 buck1_lp_vout;
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u32 buck2_lp_vout;
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u8 pwr_off_seq[MT6360_PMIC_MAX];
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};
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struct mt6360_pmic_info {
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struct i2c_client *i2c;
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struct device *dev;
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struct rt_regmap_device *regmap;
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struct regulator_dev *rdev[MT6360_PMIC_MAX];
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struct mutex io_lock;
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u8 crc8_table[CRC8_TABLE_SIZE];
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struct charger_device *chg_dev;
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u8 chip_rev;
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};
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struct mt6360_pmic_irq_desc {
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const char *name;
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irq_handler_t irq_handler;
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int irq;
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};
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#define MT6360_PMIC_IRQDESC(name) { #name, mt6360_pmic_##name##_handler, -1}
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/* register defininition */
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#define MT6360_PMIC_RST_PMIC_PAS_CODE1 (0x00)
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#define MT6360_PMIC_RST_PMIC_PAS_CODE2 (0x01)
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#define MT6360_PMIC_RST_PMIC (0x02)
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#define MT6360_PMIC_RESV1 (0x03)
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#define MT6360_PMIC_SYSUV_CTRL1 (0x04)
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#define MT6360_PMIC_SYSUV_CTRL2 (0x05)
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#define MT6360_PMIC_HW_TRAPPING (0x06)
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#define MT6360_PMIC_BUCK1_SEQOFFDLY (0x07)
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#define MT6360_PMIC_BUCK2_SEQOFFDLY (0x08)
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#define MT6360_PMIC_LDO7_SEQOFFDLY (0x09)
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#define MT6360_PMIC_LDO6_SEQOFFDLY (0x0A)
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#define MT6360_PMIC_RESV2 (0x0B)
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#define MT6360_PMIC_BUCK1_VOSEL (0x10)
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#define MT6360_PMIC_BUCK1_LP_VOSEL (0x11)
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#define MT6360_PMIC_BUCK1_OC (0x12)
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#define MT6360_PMIC_BUCK1_SFCHG_R (0x13)
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#define MT6360_PMIC_BUCK1_SFCHG_F (0x14)
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#define MT6360_PMIC_BUCK1_DVS (0x15)
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#define MT6360_PMIC_BUCK1_EN_CTRL1 (0x16)
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#define MT6360_PMIC_BUCK1_EN_CTRL2 (0x17)
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#define MT6360_PMIC_BUCK1_CTRL1 (0x18)
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#define MT6360_PMIC_BUCK1_CTRL2 (0x19)
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#define MT6360_PMIC_BUCK1_Hidden1 (0x1A)
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#define MT6360_PMIC_BUCK1_Hidden2 (0x1B)
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#define MT6360_PMIC_BUCK1_Hidden3 (0x1C)
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#define MT6360_PMIC_BUCK1_Hidden4 (0x1D)
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#define MT6360_PMIC_BUCK1_Hidden5 (0x1E)
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#define MT6360_PMIC_BUCK1_Hidden6 (0x1F)
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#define MT6360_PMIC_BUCK2_VOSEL (0x20)
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#define MT6360_PMIC_BUCK2_LP_VOSEL (0x21)
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#define MT6360_PMIC_BUCK2_OC (0x22)
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#define MT6360_PMIC_BUCK2_SFCHG_R (0x23)
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#define MT6360_PMIC_BUCK2_SFCHG_F (0x24)
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#define MT6360_PMIC_BUCK2_DVS (0x25)
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#define MT6360_PMIC_BUCK2_EN_CTRL1 (0x26)
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#define MT6360_PMIC_BUCK2_EN_CTRL2 (0x27)
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#define MT6360_PMIC_BUCK2_CTRL1 (0x28)
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#define MT6360_PMIC_BUCK2_CTRL2 (0x29)
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#define MT6360_PMIC_BUCK2_Hidden1 (0x2A)
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#define MT6360_PMIC_BUCK2_Hidden2 (0x2B)
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#define MT6360_PMIC_BUCK2_Hidden3 (0x2C)
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#define MT6360_PMIC_BUCK2_Hidden4 (0x2D)
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#define MT6360_PMIC_BUCK2_Hidden5 (0x2E)
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#define MT6360_PMIC_BUCK2_Hidden6 (0x2F)
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#define MT6360_PMIC_LDO7_EN_CTRL1 (0x30)
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#define MT6360_PMIC_LDO7_EN_CTRL2 (0x31)
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#define MT6360_PMIC_LDO7_CTRL0 (0x32)
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#define MT6360_PMIC_LDO7_CTRL1 (0x33)
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#define MT6360_PMIC_LDO7_CTRL2 (0x34)
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#define MT6360_PMIC_LDO7_CTRL3 (0x35)
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#define MT6360_PMIC_LDO6_EN_CTRL1 (0x36)
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#define MT6360_PMIC_LDO6_EN_CTRL2 (0x37)
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#define MT6360_PMIC_LDO6_CTRL0 (0x38)
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#define MT6360_PMIC_LDO6_CTRL1 (0x39)
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#define MT6360_PMIC_LDO6_CTRL2 (0x3A)
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#define MT6360_PMIC_LDO6_CTRL3 (0x3B)
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#define MT6360_PMIC_RESV3 (0x3C)
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#define MT6360_DT_VALPROP(name, type) \
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{#name, offsetof(type, name)}
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struct mt6360_val_prop {
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const char *name;
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size_t offset;
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};
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static inline void mt6360_dt_parser_helper(struct device_node *np, void *data,
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const struct mt6360_val_prop *props,
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int prop_cnt)
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{
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int i;
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for (i = 0; i < prop_cnt; i++) {
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if (unlikely(!props[i].name))
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continue;
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of_property_read_u32(np, props[i].name, data + props[i].offset);
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}
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}
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#define MT6360_PDATA_VALPROP(name, type, reg, shift, mask, func, base, rewrit) \
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{offsetof(type, name), reg, shift, mask, func, base, rewrit}
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struct mt6360_pdata_prop {
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size_t offset;
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u8 reg;
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u8 shift;
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u8 mask;
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u32 (*transform)(u32 val);
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u8 base;
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bool (*rewrite_needed)(u32 val);
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};
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extern int mt6360_pmic_regmap_register(struct mt6360_pmic_info *mli,
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struct rt_regmap_fops *fops);
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extern void mt6360_pmic_regmap_unregister(struct mt6360_pmic_info *mli);
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#endif /* __MT6360_PMIC_H */
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