threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
648 lines
17 KiB
C
648 lines
17 KiB
C
/*
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* MUSB OTG driver debugfs support
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*
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* Copyright 2010 Nokia Corporation
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* Contact: Felipe Balbi <felipe.balbi@nokia.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/debugfs.h>
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#include <linux/seq_file.h>
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#include <linux/uaccess.h>
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#include "musb_core.h"
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#include "musb_debug.h"
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#include "mu3d_hal_phy.h"
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#include "mu3d_hal_usb_drv.h"
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#include "mu3d_hal_hw.h"
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#include "mu3d_hal_qmu_drv.h"
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#ifdef CONFIG_PROJECT_PHY
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#include "mtk-phy-asic.h"
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#endif
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struct musb_register_map {
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char *name;
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unsigned offset;
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unsigned size;
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};
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static const struct musb_register_map musb_regmap[] = {
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{"FAddr", 0x00, 8},
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{"Power", 0x01, 8},
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{"Frame", 0x0c, 16},
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{"Index", 0x0e, 8},
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{"Testmode", 0x0f, 8},
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{"TxMaxPp", 0x10, 16},
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{"TxCSRp", 0x12, 16},
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{"RxMaxPp", 0x14, 16},
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{"RxCSR", 0x16, 16},
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{"RxCount", 0x18, 16},
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{"ConfigData", 0x1f, 8},
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{"DevCtl", 0x60, 8},
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{"MISC", 0x61, 8},
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{"TxFIFOsz", 0x62, 8},
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{"RxFIFOsz", 0x63, 8},
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{"TxFIFOadd", 0x64, 16},
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{"RxFIFOadd", 0x66, 16},
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{"VControl", 0x68, 32},
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{"HWVers", 0x6C, 16},
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{"EPInfo", 0x78, 8},
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{"RAMInfo", 0x79, 8},
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{"LinkInfo", 0x7A, 8},
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{"VPLen", 0x7B, 8},
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{"HS_EOF1", 0x7C, 8},
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{"FS_EOF1", 0x7D, 8},
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{"LS_EOF1", 0x7E, 8},
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{"SOFT_RST", 0x7F, 8},
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{"DMA_CNTLch0", 0x204, 16},
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{"DMA_ADDRch0", 0x208, 32},
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{"DMA_COUNTch0", 0x20C, 32},
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{"DMA_CNTLch1", 0x214, 16},
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{"DMA_ADDRch1", 0x218, 32},
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{"DMA_COUNTch1", 0x21C, 32},
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{"DMA_CNTLch2", 0x224, 16},
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{"DMA_ADDRch2", 0x228, 32},
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{"DMA_COUNTch2", 0x22C, 32},
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{"DMA_CNTLch3", 0x234, 16},
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{"DMA_ADDRch3", 0x238, 32},
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{"DMA_COUNTch3", 0x23C, 32},
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{"DMA_CNTLch4", 0x244, 16},
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{"DMA_ADDRch4", 0x248, 32},
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{"DMA_COUNTch4", 0x24C, 32},
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{"DMA_CNTLch5", 0x254, 16},
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{"DMA_ADDRch5", 0x258, 32},
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{"DMA_COUNTch5", 0x25C, 32},
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{"DMA_CNTLch6", 0x264, 16},
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{"DMA_ADDRch6", 0x268, 32},
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{"DMA_COUNTch6", 0x26C, 32},
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{"DMA_CNTLch7", 0x274, 16},
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{"DMA_ADDRch7", 0x278, 32},
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{"DMA_COUNTch7", 0x27C, 32},
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{} /* Terminating Entry */
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};
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static int musb_regdump_show(struct seq_file *s, void *unused)
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{
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struct musb *musb = s->private;
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unsigned i;
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seq_puts(s, "MUSB (M)HDRC Register Dump\n");
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for (i = 0; i < ARRAY_SIZE(musb_regmap); i++) {
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switch (musb_regmap[i].size) {
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case 8:
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seq_printf(s, "%-12s: %02x\n", musb_regmap[i].name,
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musb_readb(musb->mregs, musb_regmap[i].offset));
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break;
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case 16:
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seq_printf(s, "%-12s: %04x\n", musb_regmap[i].name,
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musb_readw(musb->mregs, musb_regmap[i].offset));
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break;
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case 32:
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seq_printf(s, "%-12s: %08x\n", musb_regmap[i].name,
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musb_readl(musb->mregs, musb_regmap[i].offset));
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break;
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}
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}
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return 0;
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}
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static int musb_regdump_open(struct inode *inode, struct file *file)
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{
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return single_open(file, musb_regdump_show, inode->i_private);
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}
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static const struct file_operations musb_regdump_fops = {
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.open = musb_regdump_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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static int musb_test_mode_show(struct seq_file *s, void *unused)
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{
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struct musb *musb = s->private;
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unsigned test;
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test = musb_readb(musb->mregs, MUSB_TESTMODE);
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if (test & FORCE_HOST)
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seq_puts(s, "force host\n");
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if (test & FIFO_ACCESS)
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seq_puts(s, "fifo access\n");
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if (test & FORCE_FS)
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seq_puts(s, "force full-speed\n");
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if (test & FORCE_HS)
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seq_puts(s, "force high-speed\n");
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if (test & TEST_PACKET_MODE)
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seq_puts(s, "test packet\n");
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if (test & TEST_K_MODE)
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seq_puts(s, "test K\n");
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if (test & TEST_J_MODE)
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seq_puts(s, "test J\n");
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if (test & TEST_SE0_NAK_MODE)
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seq_puts(s, "test SE0 NAK\n");
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return 0;
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}
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static int musb_test_mode_open(struct inode *inode, struct file *file)
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{
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return single_open(file, musb_test_mode_show, inode->i_private);
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}
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static ssize_t musb_test_mode_write(struct file *file,
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const char __user *ubuf, size_t count, loff_t *ppos)
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{
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struct seq_file *s = file->private_data;
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struct musb *musb = s->private;
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u8 test = 0;
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char buf[18];
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memset(buf, 0x00, sizeof(buf));
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if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
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return -EFAULT;
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if (!strncmp(buf, "force host", 9))
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test = FORCE_HOST;
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if (!strncmp(buf, "fifo access", 11))
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test = FIFO_ACCESS;
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if (!strncmp(buf, "force full-speed", 15))
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test = FORCE_FS;
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if (!strncmp(buf, "force high-speed", 15))
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test = FORCE_HS;
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if (!strncmp(buf, "test packet", 10)) {
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test = TEST_PACKET_MODE;
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musb_load_testpacket(musb);
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}
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if (!strncmp(buf, "test K", 6)) {
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test = TEST_K_MODE;
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#ifdef CONFIG_PROJECT_PHY
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usb20_rev6_setting(0, false);
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#endif
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}
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if (!strncmp(buf, "test J", 6)) {
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test = TEST_J_MODE;
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#ifdef CONFIG_PROJECT_PHY
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usb20_rev6_setting(0, false);
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#endif
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}
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if (!strncmp(buf, "test SE0 NAK", 12))
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test = TEST_SE0_NAK_MODE;
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musb_writeb(musb->mregs, MUSB_TESTMODE, test);
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return count;
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}
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static const struct file_operations musb_test_mode_fops = {
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.open = musb_test_mode_open,
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.write = musb_test_mode_write,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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#ifdef USE_SSUSB_QMU
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static int musb_usb_reg_show(struct seq_file *s, void *unused)
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{
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int i;
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for (i = 1; i < 9; ++i) {
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unsigned int *addr = 0;
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uintptr_t tmp;
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seq_printf(s, "EP[%d] CSR0=%08x, CSR1=%08x, CSR2=%08x\n", i,
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(unsigned int)USB_ReadCsr32(U3D_TX1CSR0, i),
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(unsigned int)USB_ReadCsr32(U3D_TX1CSR1, i),
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(unsigned int)USB_ReadCsr32(U3D_TX1CSR2, i));
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seq_printf(s, "TxQ CPR=%08x, CSR=%08x\n",
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(unsigned int)os_readl(USB_QMU_TQCPR(i)),
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(unsigned int)os_readl(USB_QMU_TQCSR(i)));
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tmp = (uintptr_t) os_readl(USB_QMU_TQCPR(i)); /* QMU GPD address --> CPU DMA address */
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if (tmp != 0) {
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/* addr = (unsigned int *)phys_to_virt(tmp); */
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addr = (unsigned int *)gpd_phys_to_virt((void *)tmp, USB_TX, i);
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/*seq_printf(s, "GPD[%08x] %08x, %08x, %08x, %08x\n",
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* addr, (*(unsigned int*)addr),
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* (*(unsigned int*)(addr+1)),
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* (*(unsigned int*)(addr+2)),
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* (*(unsigned int*)(addr+3)));
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*/
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seq_printf(s, "GPD[%p] HWO=%d, BPD=%d, Next_GPD=%lx, DataBuffer=%lx, BufferLen=%d\n",
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addr, (u32) TGPD_GET_FLAG(addr),
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(u32) TGPD_GET_FORMAT(addr), (uintptr_t) TGPD_GET_NEXT(addr),
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(uintptr_t) TGPD_GET_DATA(addr), (u32) TGPD_GET_BUF_LEN(addr));
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}
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seq_printf(s, "EP[%d] CSR0=%08x, CSR1=%08x, CSR2=%08x, CSR3=%08x\n", i,
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(unsigned int)USB_ReadCsr32(U3D_RX1CSR0, i),
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(unsigned int)USB_ReadCsr32(U3D_RX1CSR1, i),
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(unsigned int)USB_ReadCsr32(U3D_RX1CSR2, i),
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(unsigned int)USB_ReadCsr32(U3D_RX1CSR3, i));
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seq_printf(s, "RxQ CPR=%08x, CSR=%08x, LDPR=%08x\n",
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(unsigned int)os_readl(USB_QMU_RQCPR(i)),
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(unsigned int)os_readl(USB_QMU_RQCSR(i)),
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(unsigned int)os_readl(USB_QMU_RQLDPR(i)));
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tmp = (uintptr_t) os_readl(USB_QMU_RQCPR(i));
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if (tmp != 0) {
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/* addr = (unsigned int *)phys_to_virt(tmp); */
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addr = (unsigned int *)gpd_phys_to_virt((void *)tmp, USB_RX, i);
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/*seq_printf(s, "GPD[%08x] %08x, %08x, %08x, %08x\n",
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* addr, (*(unsigned int*)addr),
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* (*(unsigned int*)(addr+1)),
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* (*(unsigned int*)(addr+2)),
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* (*(unsigned int*)(addr+3)));
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*/
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seq_printf(s, "GPD[%p] HWO=%d, Next_GPD=%lx ,DataBufLen=%d, DataBuf=%lx, RecvLen=%d, Endpoint=%d\n",
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addr, (u32) TGPD_GET_FLAG(addr), (uintptr_t) TGPD_GET_NEXT(addr),
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(u32) TGPD_GET_DataBUF_LEN(addr),
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(uintptr_t) TGPD_GET_DATA(addr), (u32) TGPD_GET_BUF_LEN(addr),
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(u32) TGPD_GET_EPaddr(addr));
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}
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seq_puts(s, "---------------\n\n");
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}
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return 0;
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}
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static int musb_usb_reg_open(struct inode *inode, struct file *file)
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{
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return single_open(file, musb_usb_reg_show, inode->i_private);
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}
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static ssize_t musb_usb_reg_write(struct file *file,
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const char __user *ubuf, size_t count, loff_t *ppos)
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{
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char buf[18];
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char dir;
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int ep;
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memset(buf, 0x00, sizeof(buf));
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if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
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return -EFAULT;
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if (sscanf(buf, "resume %c %d", &dir, &ep) == 2) {
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pr_debug("%s %c %d\n", __func__, dir, ep);
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if (dir == 'R' || dir == 'r') {
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pr_debug("%s resume EP[%d]-R\n", __func__, ep);
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os_writel(USB_QMU_RQCSR(ep), QMU_Q_RESUME);
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/* mu3d_hal_resume_qmu(ep, USB_RX); */
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} else {
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pr_debug("%s resume EP[%d]-T\n", __func__, ep);
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os_writel(USB_QMU_TQCSR(ep), QMU_Q_RESUME);
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/* mu3d_hal_resume_qmu(ep, USB_TX); */
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}
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}
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return count;
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}
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static const struct file_operations musb_usb_reg_fops = {
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.open = musb_usb_reg_open,
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.write = musb_usb_reg_write,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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#endif
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#ifdef CONFIG_FPGA_EARLY_PORTING
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static int musb_scan_phase_show(struct seq_file *s, void *unused)
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{
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seq_puts(s, "#echo scan l=[0|1] d=[0~3] > scan_phase\n");
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seq_puts(s, "#echo linkup[0|1] > scan_phase\n");
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return 0;
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}
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static int musb_scan_phase(struct seq_file *s, int latch, int driving)
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{
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struct musb *musb = s->private;
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disable_irq(musb->nIrq);
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os_printk(K_INFO, "Init PHY\n");
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u3phy_ops->init(u3phy);
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os_printk(K_INFO, "Plug in the USB cable 3\n");
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mdelay(1000);
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os_printk(K_INFO, "Plug in the USB cable 2\n");
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mdelay(1000);
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os_printk(K_INFO, "Plug in the USB cable 1\n");
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mdelay(1000);
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os_printk(K_INFO, "PHY SCAN latch=%d, drivind=%d\n", latch, driving);
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mu3d_hal_phy_scan(latch, driving);
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seq_puts(s, "Finish--\n");
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return 0;
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}
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static int musb_scan_phase_open(struct inode *inode, struct file *file)
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{
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return single_open(file, musb_scan_phase_show, inode->i_private);
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}
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static ssize_t musb_scan_phase_write(struct file *file,
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const char __user *ubuf, size_t count, loff_t *ppos)
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{
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struct seq_file *s = file->private_data;
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char buf[18];
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memset(buf, 0x00, sizeof(buf));
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if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
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return -EFAULT;
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if (!strncmp(buf, "linkup1", 7)) {
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int status = RET_SUCCESS;
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int cnt = 10;
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mu3d_hal_link_up(1);
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mdelay(500);
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do {
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if ((os_readl(U3D_LINK_STATE_MACHINE) & LTSSM) != STATE_U0_STATE) {
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status = RET_FAIL;
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break;
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}
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mdelay(50);
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} while (cnt--);
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if (status != RET_SUCCESS)
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pr_debug("&&&&&& LINK UP FAIL !!&&&&&&\n");
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else
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pr_debug("&&&&&& LINK UP PASS !!&&&&&&\n");
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}
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if (!strncmp(buf, "linkup0", 7)) {
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int status = RET_SUCCESS;
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int cnt = 10;
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mu3d_hal_link_up(0);
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mdelay(500);
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do {
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if ((os_readl(U3D_LINK_STATE_MACHINE) & LTSSM) != STATE_U0_STATE) {
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status = RET_FAIL;
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break;
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}
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mdelay(50);
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} while (cnt--);
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if (status != RET_SUCCESS)
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os_printk(K_INFO, "&&&&&& LINK UP FAIL !!&&&&&&\n");
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else
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os_printk(K_INFO, "&&&&&& LINK UP PASS !!&&&&&&\n");
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}
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if (strncmp(buf, "scan", 4) == 0) {
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unsigned latch, driving;
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if (sscanf(buf, "scan l=%u d=%u", &latch, &driving) == 2) {
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os_printk(K_INFO, "%s latch=%d, driving=%d\n", __func__, latch, driving);
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musb_scan_phase(s, latch, driving);
|
|
} else {
|
|
os_printk(K_INFO, "%s Can not match\n", __func__);
|
|
}
|
|
}
|
|
|
|
return count;
|
|
}
|
|
|
|
static const struct file_operations musb_scan_phase_fops = {
|
|
.open = musb_scan_phase_open,
|
|
.write = musb_scan_phase_write,
|
|
.read = seq_read,
|
|
.llseek = seq_lseek,
|
|
.release = single_release,
|
|
};
|
|
|
|
static int musb_phy_reg_show(struct seq_file *s, void *unused)
|
|
{
|
|
seq_printf(s,
|
|
"#echo w/w8/w32 [ADDR] [VAL] > phy_reg (ex: #echo w 0x2000e4 0x1 > phy_reg)\n");
|
|
seq_puts(s, "#echo r/r8/r32 [ADDR] > phy_reg (ex: #echo r32 0x2000e4 > phy_reg)\n");
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int musb_phy_reg_open(struct inode *inode, struct file *file)
|
|
{
|
|
return single_open(file, musb_phy_reg_show, inode->i_private);
|
|
}
|
|
|
|
static ssize_t musb_phy_rege_write(struct file *file,
|
|
const char __user *ubuf, size_t count, loff_t *ppos)
|
|
{
|
|
/* warning: unused variable 's' [-Wunused-variable] */
|
|
/* struct seq_file *s = file->private_data; */
|
|
char buf[18];
|
|
|
|
memset(buf, 0x00, sizeof(buf));
|
|
|
|
if (copy_from_user(&buf, ubuf, min_t(size_t, sizeof(buf) - 1, count)))
|
|
return -EFAULT;
|
|
|
|
#ifdef CONFIG_U3_PHY_GPIO_SUPPORT
|
|
if (!strncmp(buf, "w", 1)) {
|
|
unsigned int address = 0;
|
|
unsigned int value = 0;
|
|
|
|
if (sscanf(buf, "w32 0x%x 0x%x", &address, &value) == 2) {
|
|
value = value & 0xff;
|
|
os_printk(K_INFO, "%s write32 address=0x%x, value=0x%x\n", __func__,
|
|
address, value);
|
|
U3PhyWriteReg32(address, value);
|
|
mdelay(10);
|
|
value = U3PhyReadReg32(address);
|
|
os_printk(K_INFO, "%s result=0x%x\n", __func__, value);
|
|
} else if (sscanf(buf, "w8 0x%x 0x%x", &address, &value) == 2) {
|
|
value = value & 0xff;
|
|
os_printk(K_INFO, "%s write8 address=0x%x, value=0x%x\n", __func__, address,
|
|
value);
|
|
U3PhyWriteReg8(address, value);
|
|
mdelay(10);
|
|
value = U3PhyReadReg8(address);
|
|
os_printk(K_INFO, "%s result=0x%x\n", __func__, value);
|
|
} else if (sscanf(buf, "w 0x%x 0x%x", &address, &value) == 2) {
|
|
value = value & 0xff;
|
|
pr_debug("%s write address=0x%x, value=0x%x\n", __func__, address, value);
|
|
_U3Write_Reg(address, value);
|
|
mdelay(10);
|
|
value = _U3Read_Reg(address);
|
|
os_printk(K_INFO, "%s result=0x%x\n", __func__, value);
|
|
} else {
|
|
os_printk(K_INFO, "%s Can not match\n", __func__);
|
|
}
|
|
}
|
|
|
|
if (!strncmp(buf, "r", 1)) {
|
|
unsigned int address = 0;
|
|
unsigned int value = 0;
|
|
|
|
if (sscanf(buf, "r32 0x%x", &address) == 1) {
|
|
os_printk(K_INFO, "%s read32 address=0x%x\n", __func__, address);
|
|
value = U3PhyReadReg32(address);
|
|
os_printk(K_INFO, "%s result=0x%x\n", __func__, value);
|
|
} else if (sscanf(buf, "r8 0x%x", &address) == 1) {
|
|
os_printk(K_INFO, "%s read8 address=0x%x\n", __func__, address);
|
|
value = U3PhyReadReg8(address);
|
|
os_printk(K_INFO, "%s result=0x%x\n", __func__, value);
|
|
} else if (sscanf(buf, "r 0x%x", &address) == 1) {
|
|
os_printk(K_INFO, "%s read address=0x%x\n", __func__, address);
|
|
value = _U3Read_Reg(address);
|
|
os_printk(K_INFO, "%s result=0x%x\n", __func__, value);
|
|
} else {
|
|
os_printk(K_INFO, "%s Can not match\n", __func__);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
return count;
|
|
}
|
|
|
|
|
|
static const struct file_operations musb_phy_reg_fops = {
|
|
.open = musb_phy_reg_open,
|
|
.write = musb_phy_rege_write,
|
|
.read = seq_read,
|
|
.llseek = seq_lseek,
|
|
.release = single_release,
|
|
};
|
|
#endif
|
|
|
|
#ifdef CONFIG_U3_PHY_SMT_LOOP_BACK_SUPPORT
|
|
static int smt_err_count_get(void *data, u64 *val)
|
|
{
|
|
*val = u3_loop_back_test();
|
|
|
|
os_printk(K_DEBUG, "smt_err_count_get %llu\n", *val);
|
|
|
|
return 0;
|
|
}
|
|
DEFINE_SIMPLE_ATTRIBUTE(smt_err_count, smt_err_count_get, NULL, "%llu\n");
|
|
#endif
|
|
|
|
int musb_init_debugfs(struct musb *musb)
|
|
{
|
|
struct dentry *root;
|
|
struct dentry *file;
|
|
int ret;
|
|
|
|
root = debugfs_create_dir(dev_name(musb->controller), NULL);
|
|
if (!root) {
|
|
ret = -ENOMEM;
|
|
goto err0;
|
|
}
|
|
|
|
file = debugfs_create_file("regdump", S_IRUGO, root, musb, &musb_regdump_fops);
|
|
if (!file) {
|
|
ret = -ENOMEM;
|
|
goto err1;
|
|
}
|
|
|
|
file = debugfs_create_file("testmode", S_IRUGO | S_IWUSR, root, musb, &musb_test_mode_fops);
|
|
if (!file) {
|
|
ret = -ENOMEM;
|
|
goto err1;
|
|
}
|
|
#ifdef USE_SSUSB_QMU
|
|
file = debugfs_create_file("usb_reg", S_IRUGO | S_IWUSR, root, musb, &musb_usb_reg_fops);
|
|
if (!file) {
|
|
ret = -ENOMEM;
|
|
goto err1;
|
|
}
|
|
#endif
|
|
#ifdef CONFIG_U3_PHY_SMT_LOOP_BACK_SUPPORT
|
|
file = debugfs_create_file("smt_err_count", S_IRUGO, root, musb,
|
|
&smt_err_count);
|
|
if (!file) {
|
|
ret = -ENOMEM;
|
|
goto err1;
|
|
}
|
|
#endif
|
|
#ifdef CONFIG_FPGA_EARLY_PORTING
|
|
file = debugfs_create_file("scan_phase", S_IRUGO | S_IWUSR,
|
|
root, musb, &musb_scan_phase_fops);
|
|
if (!file) {
|
|
ret = -ENOMEM;
|
|
goto err1;
|
|
}
|
|
|
|
file = debugfs_create_file("phy_reg", S_IRUGO | S_IWUSR, root, musb, &musb_phy_reg_fops);
|
|
if (!file) {
|
|
ret = -ENOMEM;
|
|
goto err1;
|
|
}
|
|
#endif
|
|
|
|
musb->debugfs_root = root;
|
|
|
|
return 0;
|
|
|
|
err1:
|
|
debugfs_remove_recursive(root);
|
|
|
|
err0:
|
|
return ret;
|
|
}
|
|
|
|
void /* __init_or_exit */ musb_exit_debugfs(struct musb *musb)
|
|
{
|
|
debugfs_remove_recursive(musb->debugfs_root);
|
|
}
|