threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
122 lines
2.9 KiB
C
122 lines
2.9 KiB
C
/*
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* Copyright (C) 2015 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <mt-plat/mtk_io.h>
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#include <mt-plat/sync_write.h>
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#include "mt_emi.h"
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#include "bwl_platform.h"
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#define EMI_BWCT0_2ND (CEN_EMI_BASE + 0x6A0)
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#define EMI_BWCT0_4TH (CEN_EMI_BASE + 0x780)
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#define EMI_BWCT0_5TH (CEN_EMI_BASE + 0x7B0)
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#define EMI_BWST0 (CEN_EMI_BASE + 0x5C4)
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#define EMI_BWST_2ND (CEN_EMI_BASE + 0x6A8)
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#define EMI_BWST_3RD (CEN_EMI_BASE + 0x778)
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#define EMI_BWST_4TH (CEN_EMI_BASE + 0x788)
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#define EMI_BWST_5TH (CEN_EMI_BASE + 0x7B8)
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#define EMI_BWVL (CEN_EMI_BASE + 0x7D0)
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#define EMI_BWVL_2ND (CEN_EMI_BASE + 0x7D4)
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#define EMI_BWVL_3RD (CEN_EMI_BASE + 0x7D8)
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#define EMI_BWVL_4TH (CEN_EMI_BASE + 0x7DC)
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#define EMI_BWVL_5TH (CEN_EMI_BASE + 0x7E0)
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static unsigned int decs_status;
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unsigned int decode_bwl_env(
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unsigned int dram_type, unsigned int ch_num, unsigned int rk_num)
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{
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if (ch_num == 1)
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return BWL_ENV_LPDDR3_1CH;
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else
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return BWL_ENV_LPDDR4_2CH;
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}
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unsigned int acquire_bwl_ctrl(void __iomem *LAST_EMI_BASE)
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{
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unsigned int timeout;
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decs_status = readl(IOMEM(LAST_EMI_DECS_CTRL));
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mt_reg_sync_writel(0x1, LAST_EMI_DECS_CTRL);
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for (timeout = 1; readl(IOMEM(LAST_EMI_DECS_CTRL)) != 2; timeout++) {
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mdelay(1);
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if ((timeout % 100) == 0) {
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mt_reg_sync_writel(decs_status, LAST_EMI_DECS_CTRL);
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pr_debug("[BWL] switch scenario timeout\n");
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return -1;
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}
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}
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return 0;
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}
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void release_bwl_ctrl(void __iomem *LAST_EMI_BASE)
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{
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mt_reg_sync_writel(decs_status, LAST_EMI_DECS_CTRL);
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}
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void resume_decs(void __iomem *CEN_EMI_BASE)
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{
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mt_reg_sync_writel(0x00030023, EMI_BWCT0_2ND);
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mt_reg_sync_writel(0x00C00023, EMI_BWCT0_4TH);
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mt_reg_sync_writel(0x00240023, EMI_BWCT0_5TH);
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}
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unsigned int get_emi_bwst(unsigned int bw_index)
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{
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void __iomem *CEN_EMI_BASE;
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CEN_EMI_BASE = mt_cen_emi_base_get();
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switch (bw_index) {
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case 0:
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return readl(IOMEM(EMI_BWST0));
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case 1:
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return readl(IOMEM(EMI_BWST_2ND));
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case 2:
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return readl(IOMEM(EMI_BWST_3RD));
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case 3:
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return readl(IOMEM(EMI_BWST_4TH));
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case 4:
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return readl(IOMEM(EMI_BWST_5TH));
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default:
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return 0;
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}
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}
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unsigned int get_emi_bwvl(unsigned int bw_index)
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{
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void __iomem *CEN_EMI_BASE;
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CEN_EMI_BASE = mt_cen_emi_base_get();
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switch (bw_index) {
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case 0:
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return readl(IOMEM(EMI_BWVL));
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case 1:
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return readl(IOMEM(EMI_BWVL_2ND));
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case 2:
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return readl(IOMEM(EMI_BWVL_3RD));
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case 3:
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return readl(IOMEM(EMI_BWVL_4TH));
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case 4:
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return readl(IOMEM(EMI_BWVL_5TH));
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default:
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return 0;
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}
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}
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