threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
61 lines
2.2 KiB
C
61 lines
2.2 KiB
C
/*
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* Copyright (C) 2015 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __CCCI_PLATFORM_H__
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#define __CCCI_PLATFORM_H__
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#include <mt-plat/sync_write.h>
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#include "ccci_config.h"
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#include "modem_sys.h"
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#include "hif/ccci_hif_cldma.h"
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/* the last EMI bank, properly not used */
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#define INVALID_ADDR (0xF0000000)
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#define KERN_EMI_BASE (0x40000000) /* Bank4 */
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/* - AP side, using mcu config base */
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/* -- AP Bank4 */
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/* ((volatile unsigned int*)(MCUSYS_CFGREG_BASE+0x200)) */
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#define AP_BANK4_MAP0 (0)
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/* ((volatile unsigned int*)(MCUSYS_CFGREG_BASE+0x204)) */
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#define AP_BANK4_MAP1 (0)
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/* - MD side, using infra config base */
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#define DBG_FLAG_DEBUG (1<<0)
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#define DBG_FLAG_JTAG (1<<1)
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#define MD_DBG_JTAG_BIT (1<<0)
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#define ccci_write32(b, a, v) mt_reg_sync_writel(v, (b)+(a))
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#define ccci_write16(b, a, v) mt_reg_sync_writew(v, (b)+(a))
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#define ccci_write8(b, a, v) mt_reg_sync_writeb(v, (b)+(a))
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#define ccci_read32(b, a) ioread32((void __iomem *)((b)+(a)))
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#define ccci_read16(b, a) ioread16((void __iomem *)((b)+(a)))
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#define ccci_read8(b, a) ioread8((void __iomem *)((b)+(a)))
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#ifdef SET_EMI_STEP_BY_STAGE
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void ccci_set_mem_access_protection_1st_stage(struct ccci_modem *md);
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void ccci_set_mem_access_protection_second_stage(int md_id);
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#endif
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unsigned int ccci_get_md_debug_mode(struct ccci_modem *md);
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int ccci_plat_common_init(void);
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int ccci_platform_init(struct ccci_modem *md);
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void ccci_reset_ccif_hw(unsigned char md_id,
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int ccif_id, void __iomem *baseA, void __iomem *baseB);
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void ccci_set_clk_cg(struct ccci_modem *md, unsigned int is_on);
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int Is_MD_EMI_voilation(void);
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/* ((ccci_get_md_debug_mode(md)&(DBG_FLAG_JTAG|DBG_FLAG_DEBUG)) != 0) */
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#define MD_IN_DEBUG(md) (0)
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#endif /* __CCCI_PLATFORM_H__ */
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