threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
60 lines
2.0 KiB
C
60 lines
2.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __NVKM_PCI_PRIV_H__
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#define __NVKM_PCI_PRIV_H__
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#define nvkm_pci(p) container_of((p), struct nvkm_pci, subdev)
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#include <subdev/pci.h>
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int nvkm_pci_new_(const struct nvkm_pci_func *, struct nvkm_device *,
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int index, struct nvkm_pci **);
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struct nvkm_pci_func {
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void (*init)(struct nvkm_pci *);
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u32 (*rd32)(struct nvkm_pci *, u16 addr);
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void (*wr08)(struct nvkm_pci *, u16 addr, u8 data);
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void (*wr32)(struct nvkm_pci *, u16 addr, u32 data);
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void (*msi_rearm)(struct nvkm_pci *);
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struct {
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int (*init)(struct nvkm_pci *);
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int (*set_link)(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
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enum nvkm_pcie_speed (*max_speed)(struct nvkm_pci *);
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enum nvkm_pcie_speed (*cur_speed)(struct nvkm_pci *);
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void (*set_version)(struct nvkm_pci *, u8);
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int (*version)(struct nvkm_pci *);
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int (*version_supported)(struct nvkm_pci *);
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} pcie;
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};
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u32 nv40_pci_rd32(struct nvkm_pci *, u16);
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void nv40_pci_wr08(struct nvkm_pci *, u16, u8);
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void nv40_pci_wr32(struct nvkm_pci *, u16, u32);
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void nv40_pci_msi_rearm(struct nvkm_pci *);
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void nv46_pci_msi_rearm(struct nvkm_pci *);
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void g84_pci_init(struct nvkm_pci *pci);
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/* pcie functions */
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void g84_pcie_set_version(struct nvkm_pci *, u8);
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int g84_pcie_version(struct nvkm_pci *);
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void g84_pcie_set_link_speed(struct nvkm_pci *, enum nvkm_pcie_speed);
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enum nvkm_pcie_speed g84_pcie_cur_speed(struct nvkm_pci *);
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enum nvkm_pcie_speed g84_pcie_max_speed(struct nvkm_pci *);
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int g84_pcie_init(struct nvkm_pci *);
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int g84_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
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int g92_pcie_version_supported(struct nvkm_pci *);
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void gf100_pcie_set_version(struct nvkm_pci *, u8);
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int gf100_pcie_version(struct nvkm_pci *);
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void gf100_pcie_set_cap_speed(struct nvkm_pci *, bool);
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int gf100_pcie_cap_speed(struct nvkm_pci *);
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int gf100_pcie_init(struct nvkm_pci *);
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int gf100_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
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int nvkm_pcie_oneinit(struct nvkm_pci *);
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int nvkm_pcie_init(struct nvkm_pci *);
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#endif
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