threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
69 lines
1.9 KiB
C
69 lines
1.9 KiB
C
/*
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* Copyright (c) 2020 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MTK_DP_HDCP1X_H__
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#define __MTK_DP_HDCP1X_H__
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#include "mtk_dp_common.h"
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#ifdef DPTX_HDCP_ENABLE
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#define DP_HDCP1_BINFO_SIZE 2
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#define DP_HDCP1_BCAPS_SIZE 1
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#define DP_HDCP1_BSTATUS_SIZE 1
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#define DP_HDCP1_AN_SIZE 8
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#define DP_HDCP1_AKSV_SIZE 5
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#define DP_HDCP1_BKSV_SIZE 5
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#define DP_HDCP1_AINFO_SIZE 1
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#define HDCP1X_BSTATUS_TIMEOUT_CNT 600
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#define HDCP1X_R0_WDT 100
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#define HDCP1X_REP_RDY_WDT 5000
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#define HDCP1X_REP_MAXDEVS 128
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#define HDCP1X_REAUNTH_COUNT 3
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enum DPTX_DRV_HDCP1X_MainStates {
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HDCP1X_MainState_H2 = 0,
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HDCP1X_MainState_A0 = 1,
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HDCP1X_MainState_A1 = 2,
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HDCP1X_MainState_A2 = 3,
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HDCP1X_MainState_A3 = 4,
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HDCP1X_MainState_A4 = 5,
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HDCP1X_MainState_A5 = 6,
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HDCP1X_MainState_A6 = 7,
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HDCP1X_MainState_A7 = 8,
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};
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enum DPTX_DRV_HDCP1X_SubStates {
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HDCP1X_SubFSM_IDLE = 0,
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HDCP1X_SubFSM_CHECKHDCPCAPABLE = 1,
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HDCP1X_SubFSM_ExchangeKSV = 2,
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HDCP1X_SubFSM_VerifyBksv = 3,
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HDCP1X_SubFSM_Computation = 4,
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HDCP1X_SubFSM_CheckR0 = 5,
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HDCP1X_SubFSM_AuthDone = 6,
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HDCP1X_SubFSM_PollingRdyBit = 7,
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HDCP1X_SubFSM_AuthWithRepeater = 8,
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HDCP1X_SubFSM_AuthFail = 9,
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};
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bool mdrv_DPTx_HDCP1X_irq(struct mtk_dp *mtk_dp);
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bool mdrv_DPTx_HDCP1x_Support(struct mtk_dp *mtk_dp);
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void mdrv_DPTx_HDCP1X_FSM(struct mtk_dp *mtk_dp);
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void mdrv_DPTx_HDCP1X_SetStartAuth(struct mtk_dp *mtk_dp, bool bEnable);
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#endif
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#endif
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