threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
75 lines
2.4 KiB
C
75 lines
2.4 KiB
C
/*
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* Copyright (C) 2019 MediaTek Inc.
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef _MTK_DRM_PMQOS_H_
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#define _MTK_DRM_PMQOS_H_
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#include "mmdvfs_pmqos.h"
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#if defined(CONFIG_MACH_MT6779)
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#include "helio-dvfsrc-opp-mt6779.h"
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#elif defined(CONFIG_MACH_MT6885) || defined(CONFIG_MACH_MT6893)
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#include "helio-dvfsrc-opp-mt6885.h"
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#include "dt-bindings/memory/mt6885-larb-port.h"
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#elif defined(CONFIG_MACH_MT6873)
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#include "helio-dvfsrc-opp-mt6873.h"
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#include "dt-bindings/memory/mt6873-larb-port.h"
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#elif defined(CONFIG_MACH_MT6853)
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#include "helio-dvfsrc-opp-mt6853.h"
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#include "dt-bindings/memory/mt6853-larb-port.h"
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#elif defined(CONFIG_MACH_MT6833)
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#include "helio-dvfsrc-opp-mt6833.h"
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#include "dt-bindings/memory/mt6833-larb-port.h"
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#elif defined(CONFIG_MACH_MT6877)
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//#include "helio-dvfsrc-opp-mt6877.h"
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#include "dt-bindings/memory/mt6877-larb-port.h"
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#elif defined(CONFIG_MACH_MT6781)
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//#include "helio-dvfsrc-opp-mt6781.h"
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#include "dt-bindings/memory/mt6781-larb-port.h"
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#endif
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#include <linux/pm_qos.h>
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enum DISP_QOS_BW_MODE {
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DISP_BW_NORMAL_MODE = 0,
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DISP_BW_FBDC_MODE,
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DISP_BW_HRT_MODE,
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};
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#define NO_PENDING_HRT (0xFFFFFFFF)
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#define OVL_REQ_HRT (0x1)
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#define RDMA_REQ_HRT (0x2)
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struct drm_crtc;
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struct mtk_drm_crtc;
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struct mtk_drm_qos_ctx {
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unsigned int last_hrt_req;
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atomic_t last_hrt_idx;
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atomic_t hrt_cond_sig;
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wait_queue_head_t hrt_cond_wq;
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};
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int __mtk_disp_set_module_bw(struct mm_qos_request *request, int comp_id,
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unsigned int bandwidth, unsigned int mode);
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void __mtk_disp_set_module_hrt(struct mm_qos_request *request,
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unsigned int bandwidth);
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int mtk_disp_set_hrt_bw(struct mtk_drm_crtc *mtk_crtc,
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unsigned int overlap_num);
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void mtk_drm_pan_disp_set_hrt_bw(struct drm_crtc *crtc, const char *caller);
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int __mtk_disp_pmqos_slot_look_up(int comp_id, int mode);
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int __mtk_disp_pmqos_port_look_up(int comp_id);
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int mtk_disp_hrt_cond_init(struct drm_crtc *crtc);
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void mtk_drm_mmdvfs_init(void);
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void mtk_drm_set_mmclk_by_pixclk(struct drm_crtc *crtc, unsigned int pixclk,
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const char *caller);
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#endif
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