threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
73 lines
2.4 KiB
C
73 lines
2.4 KiB
C
/*
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* Copyright 2014 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef CIK_REGS_H
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#define CIK_REGS_H
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/* if PTR32, these are the bases for scratch and lds */
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#define PRIVATE_BASE(x) ((x) << 0) /* scratch */
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#define SHARED_BASE(x) ((x) << 16) /* LDS */
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#define PTR32 (1 << 0)
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#define ALIGNMENT_MODE(x) ((x) << 2)
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#define SH_MEM_ALIGNMENT_MODE_UNALIGNED 3
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#define DEFAULT_MTYPE(x) ((x) << 4)
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#define APE1_MTYPE(x) ((x) << 7)
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/* valid for both DEFAULT_MTYPE and APE1_MTYPE */
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#define MTYPE_CACHED 0
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#define MTYPE_NONCACHED 3
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#define DEFAULT_CP_HQD_PERSISTENT_STATE (0x33U << 8)
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#define PRELOAD_REQ (1 << 0)
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#define MQD_CONTROL_PRIV_STATE_EN (1U << 8)
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#define DEFAULT_MIN_IB_AVAIL_SIZE (3U << 20)
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#define IB_ATC_EN (1U << 23)
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#define QUANTUM_EN 1U
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#define QUANTUM_SCALE_1MS (1U << 4)
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#define QUANTUM_DURATION(x) ((x) << 8)
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#define RPTR_BLOCK_SIZE(x) ((x) << 8)
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#define MIN_AVAIL_SIZE(x) ((x) << 20)
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#define DEFAULT_RPTR_BLOCK_SIZE RPTR_BLOCK_SIZE(5)
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#define DEFAULT_MIN_AVAIL_SIZE MIN_AVAIL_SIZE(3)
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#define PQ_ATC_EN (1 << 23)
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#define NO_UPDATE_RPTR (1 << 27)
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#define DOORBELL_OFFSET(x) ((x) << 2)
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#define DOORBELL_EN (1 << 30)
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#define PRIV_STATE (1 << 30)
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#define KMD_QUEUE (1 << 31)
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#define AQL_ENABLE 1
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#define GRBM_GFX_INDEX 0x30800
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#define ATC_VMID_PASID_MAPPING_VALID (1U << 31)
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#endif
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