Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
146 lines
3.9 KiB
C
146 lines
3.9 KiB
C
/*
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* Copyright (C) 2018 MediaTek Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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* See http://www.gnu.org/licenses/gpl-2.0.html for more details.
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*/
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#ifndef __HELIO_DVFSRC_H
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#define __HELIO_DVFSRC_H
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#include <linux/delay.h>
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#include <linux/devfreq.h>
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#include <linux/io.h>
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#if defined(CONFIG_MACH_MT6775)
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#include <helio-dvfsrc-mt6775.h>
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#elif defined(CONFIG_MACH_MT6771)
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#include <helio-dvfsrc-mt6771.h>
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#include "helio-dvfsrc-opp.h"
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#elif defined(CONFIG_MACH_MT6739)
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#include "helio-dvfsrc-opp.h"
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#endif
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struct reg_config {
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u32 offset;
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u32 val;
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};
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struct helio_dvfsrc {
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struct devfreq *devfreq;
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void __iomem *regs;
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void __iomem *sram_regs;
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struct mutex lock;
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int enable;
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int skip;
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int flag;
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int dram_type;
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unsigned int log_mask;
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int curr_vcore_uv;
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int curr_ddr_khz;
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bool vcore_dvs;
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bool ddr_dfs;
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bool mm_clk;
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struct notifier_block pm_qos_memory_bw_nb;
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struct notifier_block pm_qos_cpu_memory_bw_nb;
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struct notifier_block pm_qos_gpu_memory_bw_nb;
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struct notifier_block pm_qos_mm_memory_bw_nb;
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struct notifier_block pm_qos_md_peri_memory_bw_nb;
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struct notifier_block pm_qos_emi_opp_nb;
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struct notifier_block pm_qos_vcore_opp_nb;
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struct notifier_block pm_qos_vcore_dvfs_fixed_opp_nb;
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struct reg_config *init_config;
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struct reg_config *suspend_config;
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struct reg_config *resume_config;
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};
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extern spinlock_t helio_dvfsrc_lock;
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extern int helio_dvfsrc_add_interface(struct device *dev);
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extern void helio_dvfsrc_remove_interface(struct device *dev);
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extern void helio_dvfsrc_platform_init(struct helio_dvfsrc *dvfsrc);
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extern void spm_check_status_before_dvfs(void);
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extern int dvfsrc_transfer_to_dram_level(int data);
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extern int dvfsrc_transfer_to_vcore_level(int data);
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#if !defined(CONFIG_MACH_MT6771)
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extern int vcorefs_get_curr_vcore(void);
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extern int vcorefs_get_curr_ddr(void);
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extern int dvfsrc_get_vcore_by_steps(u32 opp);
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extern int dvfsrc_get_ddr_by_steps(u32 opp);
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#endif
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extern int is_qos_can_work(void);
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extern int spm_dvfs_flag_init(void);
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extern void dvfsrc_update_opp_table(void);
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extern char *dvfsrc_get_opp_table_info(char *p);
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extern u32 vcore_to_vcore_dvfs_level[];
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extern u32 emi_to_vcore_dvfs_level[];
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extern u32 vcore_dvfs_to_vcore_dvfs_level[];
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extern void dvfsrc_update_sspm_vcore_opp_table(int opp, unsigned int vcore_uv);
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extern void dvfsrc_update_sspm_ddr_opp_table(int opp, unsigned int ddr_khz);
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extern int dvfsrc_get_bw(int type);
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extern int get_cur_vcore_dvfs_opp(void);
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extern int is_dvfsrc_opp_fixed(void);
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#define DVFSRC_REG(dvfsrc, offset) (dvfsrc->regs + offset)
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#define DVFSRC_SRAM_REG(dvfsrc, offset) (dvfsrc->sram_regs + offset)
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#define DVFSRC_TIMEOUT 1000
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#define is_dvfsrc_in_progress(dvfsrc) \
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(dvfsrc_read(dvfsrc, DVFSRC_LEVEL) & 0xFFFF)
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#define get_dvfsrc_level(dvfsrc) \
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(dvfsrc_read(dvfsrc, DVFSRC_LEVEL) >> 16)
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/* PMIC */
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#define vcore_pmic_to_uv(pmic) \
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(((pmic) * VCORE_STEP_UV) + VCORE_BASE_UV)
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#define vcore_uv_to_pmic(uv) /* pmic >= uv */ \
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((((uv) - VCORE_BASE_UV) + (VCORE_STEP_UV - 1)) / VCORE_STEP_UV)
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#define wait_for_completion(condition, timeout) \
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({ \
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int i = 0; \
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while (!(condition)) { \
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if (i >= (timeout)) { \
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i = -EBUSY; \
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break; \
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} \
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udelay(1); \
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i++; \
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} \
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i; \
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})
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#define dvfsrc_write(dvfsrc, offset, val) \
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writel(val, DVFSRC_REG(dvfsrc, offset))
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#define dvfsrc_read(dvfsrc, offset) \
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readl(DVFSRC_REG(dvfsrc, offset))
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#define dvfsrc_sram_write(dvfsrc, offset, val) \
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writel(val, DVFSRC_SRAM_REG(dvfsrc, offset))
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#define dvfsrc_sram_read(dvfsrc, offset) \
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readl(DVFSRC_SRAM_REG(dvfsrc, offset))
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extern struct helio_dvfsrc *dvfsrc;
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#endif /* __HELIO_DVFSRC_H */
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