threeeye
bc1d038eac
Squashed backup commit (no shallow-clone history issues) of xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2 branch, upstream commit 9eece662e) plus all fixes applied to get everpal_defconfig building clean against a modern (GCC 15.2.0) toolchain -- see the previous commit message on the lineage-23.2 branch (also in this repo history is not available here since this is a squashed snapshot; full incremental history lives in the local DL380 checkout and the upstream GitHub remote). Upstream: https://github.com/xiaomi-mt6833-dev/kernel_xiaomi_mt6833 (lineage-23.2)
140 lines
3.6 KiB
Plaintext
140 lines
3.6 KiB
Plaintext
config CLK_RENESAS
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bool "Renesas SoC clock support" if COMPILE_TEST && !ARCH_RENESAS
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default y if ARCH_RENESAS
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select CLK_EMEV2 if ARCH_EMEV2
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select CLK_RZA1 if ARCH_R7S72100
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select CLK_R8A73A4 if ARCH_R8A73A4
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select CLK_R8A7740 if ARCH_R8A7740
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select CLK_R8A7743 if ARCH_R8A7743
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select CLK_R8A7745 if ARCH_R8A7745
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select CLK_R8A7778 if ARCH_R8A7778
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select CLK_R8A7779 if ARCH_R8A7779
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select CLK_R8A7790 if ARCH_R8A7790
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select CLK_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
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select CLK_R8A7792 if ARCH_R8A7792
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select CLK_R8A7794 if ARCH_R8A7794
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select CLK_R8A7795 if ARCH_R8A7795
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select CLK_R8A7796 if ARCH_R8A7796
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select CLK_R8A77995 if ARCH_R8A77995
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select CLK_SH73A0 if ARCH_SH73A0
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if CLK_RENESAS
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config CLK_RENESAS_LEGACY
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bool "Legacy DT clock support"
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depends on CLK_R8A7790 || CLK_R8A7791 || CLK_R8A7792 || CLK_R8A7794
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default y
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help
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Enable backward compatibility with old device trees describing a
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hierarchical representation of the various CPG and MSTP clocks.
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Say Y if you want your kernel to work with old DTBs.
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# SoC
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config CLK_EMEV2
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bool "Emma Mobile EV2 clock support" if COMPILE_TEST
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config CLK_RZA1
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bool "RZ/A1H clock support" if COMPILE_TEST
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select CLK_RENESAS_CPG_MSTP
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config CLK_R8A73A4
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bool "R-Mobile APE6 clock support" if COMPILE_TEST
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select CLK_RENESAS_CPG_MSTP
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select CLK_RENESAS_DIV6
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config CLK_R8A7740
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bool "R-Mobile A1 clock support" if COMPILE_TEST
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select CLK_RENESAS_CPG_MSTP
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select CLK_RENESAS_DIV6
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config CLK_R8A7743
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bool "RZ/G1M clock support" if COMPILE_TEST
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select CLK_RCAR_GEN2_CPG
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config CLK_R8A7745
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bool "RZ/G1E clock support" if COMPILE_TEST
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select CLK_RCAR_GEN2_CPG
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config CLK_R8A7778
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bool "R-Car M1A clock support" if COMPILE_TEST
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select CLK_RENESAS_CPG_MSTP
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config CLK_R8A7779
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bool "R-Car H1 clock support" if COMPILE_TEST
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select CLK_RENESAS_CPG_MSTP
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config CLK_R8A7790
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bool "R-Car H2 clock support" if COMPILE_TEST
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select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY
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select CLK_RCAR_GEN2_CPG
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select CLK_RENESAS_DIV6
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config CLK_R8A7791
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bool "R-Car M2-W/N clock support" if COMPILE_TEST
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select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY
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select CLK_RCAR_GEN2_CPG
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select CLK_RENESAS_DIV6
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config CLK_R8A7792
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bool "R-Car V2H clock support" if COMPILE_TEST
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select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY
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select CLK_RCAR_GEN2_CPG
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config CLK_R8A7794
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bool "R-Car E2 clock support" if COMPILE_TEST
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select CLK_RCAR_GEN2 if CLK_RENESAS_LEGACY
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select CLK_RCAR_GEN2_CPG
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select CLK_RENESAS_DIV6
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config CLK_R8A7795
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bool "R-Car H3 clock support" if COMPILE_TEST
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select CLK_RCAR_GEN3_CPG
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config CLK_R8A7796
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bool "R-Car M3-W clock support" if COMPILE_TEST
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select CLK_RCAR_GEN3_CPG
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config CLK_R8A77995
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bool "R-Car D3 clock support" if COMPILE_TEST
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select CLK_RCAR_GEN3_CPG
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config CLK_SH73A0
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bool "SH-Mobile AG5 clock support" if COMPILE_TEST
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select CLK_RENESAS_CPG_MSTP
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select CLK_RENESAS_DIV6
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# Family
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config CLK_RCAR_GEN2
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bool "R-Car Gen2 legacy clock support" if COMPILE_TEST
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select CLK_RENESAS_CPG_MSTP
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select CLK_RENESAS_DIV6
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config CLK_RCAR_GEN2_CPG
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bool "R-Car Gen2 CPG clock support" if COMPILE_TEST
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select CLK_RENESAS_CPG_MSSR
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config CLK_RCAR_GEN3_CPG
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bool "R-Car Gen3 CPG clock support" if COMPILE_TEST
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select CLK_RENESAS_CPG_MSSR
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config CLK_RCAR_USB2_CLOCK_SEL
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bool "Renesas R-Car USB2 clock selector support"
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depends on ARCH_RENESAS || COMPILE_TEST
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help
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This is a driver for R-Car USB2 clock selector
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# Generic
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config CLK_RENESAS_CPG_MSSR
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bool "CPG/MSSR clock support" if COMPILE_TEST
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select CLK_RENESAS_DIV6
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config CLK_RENESAS_CPG_MSTP
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bool "MSTP clock support" if COMPILE_TEST
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config CLK_RENESAS_DIV6
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bool "DIV6 clock support" if COMPILE_TEST
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endif # CLK_RENESAS
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